PreTradeRisk

Prompt

Design pre-trade risk check system in an FPGA for a prime brokerage to allow client access to the markets under their broker id. Support FIX 4.4 standard order entry and support all major risk check procedures. Define the blocks of the FPGA IP required and their interfaces and parameters that need to be loaded by Software. There should be a PCIE interface with DMA channels for communicating with the software Layers. A seperate order management system, communicates with the software and provides the parameters as well as logging the ordering information and any risk check violations draw a black diagram, showing all the blocks and then zoom into each individual block showing it’s interface