Consulting Slides
Prompt
Hi, I'm going to provide you below a bunch of copy-pasted information from Nvidia about their Hopper, Blackwell, and Rubin data center GPU lines. I want you to make me McKinsey-style slide with the specifications and important differences between these generations of Nvidia chips. I care most about compute, HBM, scale up world size, interconnect, mem bandwidth. The slide will need to be fairly information dense! Use whatever web technologies you want for making this. # Nvidia Data Center GPU Architecture Report: Hopper, Blackwell, and Rubin ## The evolution of AI computing infrastructure Nvidia's data center GPU portfolio represents a revolutionary progression in AI computing, with each architecture generation delivering exponential performance improvements. The transition from Hopper (current) to Blackwell (2025) and Rubin (2026) demonstrates Nvidia's shift to an annual release cadence, fundamentally changing the pace of AI infrastructure development. The most striking advancement is Blackwell's dual-die design achieving **208 billion transistors** - a 2.6x increase over Hopper's 80 billion - while delivering up to **25x better energy efficiency** for AI inference. Looking ahead, Rubin's integration of custom ARM CPUs and HBM4 memory promises another 3.3x performance leap, establishing a clear path toward exascale AI computing. ## 1. Hopper Architecture: Current generation powerhouse ### Complete Product Specifications | **Model** | **H100 SXM5** | **H100 PCIe** | **H100 NVL** | **H200 SXM5** | **H200 NVL** | |-----------|---------------|---------------|--------------|---------------|--------------| | **CUDA Cores** | 16,896 | 14,592 | 14,592 | 16,896 | 14,592 | | **Tensor Cores** | 528 (4th Gen) | 456 (4th Gen) | 456 (4th Gen) | 528 (4th Gen) | 456 (4th Gen) | | **Memory** | 80GB HBM3 | 80GB HBM2e | 94GB HBM3 | 141GB HBM3e | 141GB HBM3e | | **Memory Bandwidth** | 3.35 TB/s | 2.0 TB/s | 3.9 TB/s | 4.8 TB/s | 4.8 TB/s | | **FP32 Performance** | 67 TFLOPS | 60 TFLOPS | 60 TFLOPS | 67 TFLOPS | 60 TFLOPS | | **FP16/BF16 Tensor** | 1,979 TFLOPS | 1,671 TFLOPS | 1,671 TFLOPS | 1,979 TFLOPS | 1,671 TFLOPS | | **FP8 Tensor** | 3,958 TFLOPS | 3,341 TFLOPS | 3,341 TFLOPS | 3,958 TFLOPS | 3,341 TFLOPS | | **TDP** | 700W | 350W | 350-400W | 700W | 600W | | **NVLink** | 900 GB/s | N/A | 600 GB/s | 900 GB/s | 900 GB/s | | **Form Factor** | SXM5 | PCIe dual-slot | PCIe dual-slot | SXM5 | PCIe dual-slot | | **MIG Support** | 7 instances | 7 instances | 7 instances | 7 instances | 7 instances | | **Availability** | Oct 2022 | Oct 2022 | Q1 2023 | Q2 2024 | Q4 2024 | | **Price (Est.)** | $25,000-30,000 | $22,000-25,000 | $30,970 | Premium over H100 | Premium over H100 | ### Hopper Key Technologies The Hopper architecture introduced several breakthrough technologies that redefined AI computing. The **Transformer Engine** with dynamic FP8/FP16 precision delivers up to 6x faster training for transformer models. Fourth-generation Tensor Cores support structured sparsity for 2x performance improvements, while **Confidential Computing** provides hardware-based security for sensitive workloads. The architecture's **80 billion transistors** on TSMC's custom 4N process achieve remarkable efficiency at 814mm² die size. ## 2. Blackwell Architecture: Revolutionary dual-die design ### Complete Product Specifications | **Model** | **B100** | **B200** | **GB200 Superchip** | **GB200 NVL72** | |-----------|----------|----------|---------------------|-----------------| | **Architecture** | Dual GB100 dies | Dual GB100 dies | 2x B200 + Grace CPU | 72x B200 + 36x Grace | | **Transistors** | 208 billion | 208 billion | 416B (GPU) + Grace | 14.9 trillion total | | **Memory (GPU)** | 192GB HBM3e | 192GB HBM3e | 384GB HBM3e | 13.4TB HBM3e | | **Memory Bandwidth** | 8 TB/s | 8 TB/s | 16 TB/s | 576 TB/s | | **FP32 Performance** | 80 TFLOPS | 80 TFLOPS | 160 TFLOPS | 5,760 TFLOPS | | **FP8 Tensor** | 10 PFLOPS | 10 PFLOPS | 20 PFLOPS | 720 PFLOPS | | **FP4 Tensor** | 20 PFLOPS | 20 PFLOPS | 40 PFLOPS | 1,440 PFLOPS | | **TDP** | 1000W | 1000W | ~1500W | 120kW rack | | **NVLink** | 1.8 TB/s | 1.8 TB/s | 3.6 TB/s | 130 TB/s total | | **Inter-die Link** | 10 TB/s NV-HBI | 10 TB/s NV-HBI | 10 TB/s + 900GB/s C2C | Multiple domains | | **CPU Specs** | N/A | N/A | 72 ARM cores, 480GB RAM | 2,592 ARM cores | | **Form Factor** | SXM6 | SXM6 | Superchip module | Full rack (3,000 lbs) | | **Availability** | Q1 2025 | Q1 2025 | Q1-Q2 2025 | Q2 2025 | | **Price (Est.)** | $30,000-35,000 | $45,000-50,000 | $60,000-70,000 | ~$3 million | ### Blackwell's architectural breakthrough Blackwell represents the first major GPU to overcome reticle limitations through a revolutionary dual-die design connected by **10 TB/s NV-HBI interconnect**. The second-generation Transformer Engine introduces FP4 precision, doubling AI performance while maintaining accuracy. With **208 billion transistors** on TSMC's enhanced 4NP process, Blackwell achieves unprecedented compute density. The GB200 NVL72 rack-scale system creates a single **1.4 exaflops** inference platform, enabling real-time processing of trillion-parameter models. ## 3. Rubin Architecture: The future of accelerated computing ### Announced Specifications and Roadmap | **Model** | **Rubin (2026)** | **Rubin Ultra (2027)** | **Vera CPU** | |-----------|------------------|------------------------|--------------| | **Process Node** | TSMC 3nm | TSMC 3nm enhanced | TSMC 3nm | | **Configuration** | Single large die | 4x GPU chiplets | Standalone/integrated | | **Memory** | 288GB HBM4 | 1TB HBM4e | 480GB+ LPDDR5X | | **Memory Bandwidth** | 13 TB/s | 52 TB/s (total) | 512 GB/s+ | | **FP4 Performance** | 50 PFLOPS | 100 PFLOPS/package | N/A | | **FP8 Performance** | 25 PFLOPS | 50 PFLOPS/package | N/A | | **System Scale** | NVL144 (144 GPUs) | NVL576 (576 dies) | 36 CPUs in NVL | | **NVLink** | 7th gen, 3.6 TB/s | 1.5 PB/s system | 1.8 TB/s to GPU | | **CPU Cores** | N/A | N/A | 88 ARM cores | | **Power** | TBD | 600kW+ per rack | TBD | | **Performance vs Blackwell** | 3.3x improvement | 6x+ improvement | N/A | | **Availability** | H2 2026 | H2 2027 | H2 2026 | ### Rubin's transformative vision Rubin marks Nvidia's transition to **3nm manufacturing** and introduces HBM4 memory technology with **13 TB/s bandwidth**. The architecture's tight integration with custom Vera ARM CPUs creates a unified computing platform optimized for AI reasoning and agentic systems. Rubin Ultra's chiplet design with four reticle-sized dies per package pushes boundaries further, delivering **100 petaflops FP4 performance** per package and scaling to 576 GPU dies in a single rack. ## 4. Cross-generation performance comparison ### Computational Performance Evolution | **Metric** | **H100** | **H200** | **B200** | **Improvement** | **Rubin (2026)** | **Total Gain** | |------------|----------|----------|----------|-----------------|------------------|----------------| | **FP64 TFLOPS** | 34 | 34 | 40 | 1.2x | TBD | TBD | | **FP32 TFLOPS** | 67 | 67 | 80 | 1.2x | ~160 | 2.4x | | **TF32 Tensor** | 989 TFLOPS | 989 TFLOPS | 2.5 PFLOPS | 2.5x | ~7.5 PFLOPS | 7.6x | | **FP16/BF16 Tensor** | 1.98 PFLOPS | 1.98 PFLOPS | 5 PFLOPS | 2.5x | ~15 PFLOPS | 7.6x | | **FP8 Tensor** | 3.96 PFLOPS | 3.96 PFLOPS | 10 PFLOPS | 2.5x | 25 PFLOPS | 6.3x | | **FP4 Tensor** | N/A | N/A | 20 PFLOPS | New | 50 PFLOPS | N/A | | **Memory Capacity** | 80GB | 141GB | 192GB | 2.4x vs H100 | 288GB | 3.6x | | **Memory Bandwidth** | 3.35 TB/s | 4.8 TB/s | 8 TB/s | 2.4x vs H100 | 13 TB/s | 3.9x | | **NVLink Speed** | 900 GB/s | 900 GB/s | 1.8 TB/s | 2x | 3.6 TB/s | 4x | | **Power Efficiency** | Baseline | 1.0x | 2.5x | 2.5x better | ~8x | 8x better | ## 5. Architecture improvements between generations ### Hopper to Blackwell transformation The transition from Hopper to Blackwell represents a fundamental architectural shift rather than incremental improvement. Blackwell's **dual-die design** overcomes manufacturing constraints while delivering 2.6x more transistors. The second-generation Transformer Engine with **FP4 precision support** doubles AI performance without accuracy loss. Memory bandwidth increases 2.4x to **8 TB/s**, while NVLink 5.0 doubles interconnect speed to **1.8 TB/s**, enabling unprecedented multi-GPU scaling. ### Blackwell to Rubin evolution Rubin's move to **3nm process technology** enables another generational leap in compute density and efficiency. The integration of custom **88-core Vera ARM CPUs** creates a unified heterogeneous computing platform. HBM4 memory technology delivers **13 TB/s bandwidth** - a 63% increase over Blackwell. Performance improvements of **3.3x over Blackwell** position Rubin for next-generation AI workloads including reasoning systems and autonomous agents. ## 6. Target workloads and specialized capabilities ### Workload Optimization by Architecture | **Workload Type** | **Hopper Strengths** | **Blackwell Advantages** | **Rubin Focus** | |-------------------|---------------------|-------------------------|-----------------| | **LLM Training** | Models up to 175B params | Trillion-parameter models | Multi-modal training | | **LLM Inference** | Production deployment | 30x faster than H100 | Massive context windows | | **Scientific Computing** | Strong FP64 performance | Enhanced double precision | Quantum simulation | | **Database/Analytics** | Standard acceleration | 6x with decompression engine | Real-time analytics | | **Computer Vision** | Excellent CNN performance | Advanced video processing | Multi-modal AI | | **Recommendation Systems** | MIG multi-tenancy | Massive embedding tables | Personalized AI agents | | **Graph Neural Networks** | Good baseline | 2.25x improvement | Complex graph reasoning | ### Special features comparison Each architecture introduces unique capabilities addressing evolving AI requirements. Hopper's **Confidential Computing** and **Multi-Instance GPU** enable secure multi-tenant deployments. Blackwell's **RAS Engine** provides AI-powered predictive maintenance, while the **Decompression Engine** accelerates database workloads by 6x. Rubin's planned **disaggregated architecture** will optimize prefill versus decode processing for inference workloads, with specialized **Rubin CPX** variants for massive-context applications. ## Conclusion Nvidia's data center GPU evolution from Hopper through Blackwell to Rubin demonstrates unprecedented innovation velocity in response to explosive AI demand. The progression shows **900x performance gains** from Hopper to Rubin while reducing costs by 99.97% per operation. Blackwell's imminent arrival with revolutionary dual-die architecture and FP4 support will enable trillion-parameter model deployments, while Rubin's 2026 introduction of HBM4 and 3nm technology establishes the foundation for autonomous AI systems. The shift to an **annual release cadence** ensures continuous technological advancement, with each generation delivering transformative capabilities rather than incremental improvements. For organizations planning AI infrastructure investments, this roadmap provides clear visibility into performance trajectories, enabling strategic decisions aligned with exponentially growing computational requirements of next-generation AI applications.
A system prompt was added to support web rendering
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<div class="slide-container">
<div class="nvidia-logo">NVIDIA</div>
<div class="slide-header">
<div class="slide-title">NVIDIA Data Center GPU Architecture Evolution</div>
<div class="slide-subtitle">Hopper (2022) → Blackwell (2025) → Rubin (2026): Performance, Scale & Efficiency Transformation</div>
</div>
<div class="content-grid">
<div class="architecture-section hopper">
<div class="arch-title">
<div class="arch-icon"></div>
Hopper Architecture (Current)
</div>
<div class="specs-grid">
<div class="spec-item">
<div class="spec-label">Flagship Model</div>
<div class="spec-value">H200 SXM5</div>
</div>
<div class="spec-item">
<div class="spec-label">Transistors</div>
<div class="spec-value">80B (TSMC 4N)</div>
</div>
<div class="spec-item">
<div class="spec-label">HBM Memory</div>
<div class="spec-value">141GB HBM3e</div>
</div>
<div class="spec-item">
<div class="spec-label">Memory BW</div>
<div class="spec-value">4.8 TB/s</div>
</div>
<div class="spec-item">
<div class="spec-label">FP8 Tensor</div>
<div class="spec-value">3.96 PFLOPS</div>
</div>
<div class="spec-item">
<div class="spec-label">NVLink</div>
<div class="spec-value">900 GB/s</div>
</div>
<div class="spec-item">
<div class="spec-label">Scale-up</div>
<div class="spec-value">8-GPU pods</div>
</div>
<div class="spec-item">
<div class="spec-label">TDP</div>
<div class="spec-value">700W</div>
</div>
</div>
<div style="font-size: 11px; color: #a0a0a0; line-height: 1.4;">
<strong>Key Features:</strong> 4th-gen Tensor Cores, Transformer Engine, Confidential Computing, MIG support
</div>
</div>
<div class="architecture-section blackwell">
<div class="arch-title">
<div class="arch-icon"></div>
Blackwell Architecture (2025)
</div>
<div class="specs-grid">
<div class="spec-item">
<div class="spec-label">Flagship Model</div>
<div class="spec-value">GB200 Superchip</div>
</div>
<div class="spec-item">
<div class="spec-label">Transistors</div>
<div class="spec-value">208B (dual-die)</div>
</div>
<div class="spec-item">
<div class="spec-label">HBM Memory</div>
<div class="spec-value">192GB HBM3e</div>
</div>
<div class="spec-item">
<div class="spec-label">Memory BW</div>
<div class="spec-value">8 TB/s</div>
</div>
<div class="spec-item">
<div class="spec-label">FP8 Tensor</div>
<div class="spec-value">10 PFLOPS</div>
</div>
<div class="spec-item">
<div class="spec-label">NVLink</div>
<div class="spec-value">1.8 TB/s</div>
</div>
<div class="spec-item">
<div class="spec-label">Scale-up</div>
<div class="spec-value">72-GPU racks</div>
</div>
<div class="spec-item">
<div class="spec-label">TDP</div>
<div class="spec-value">1000W</div>
</div>
</div>
<div style="font-size: 11px; color: #a0a0a0; line-height: 1.4;">
<strong>Breakthrough:</strong> <span class="highlight">FP4 precision</span>, 10TB/s inter-die link, 25x energy efficiency vs H100
</div>
</div>
<div class="architecture-section rubin">
<div class="arch-title">
<div class="arch-icon"></div>
Rubin Architecture (2026)
</div>
<div class="specs-grid">
<div class="spec-item">
<div class="spec-label">Process Node</div>
<div class="spec-value">TSMC 3nm</div>
</div>
<div class="spec-item">
<div class="spec-label">CPU Integration</div>
<div class="spec-value">Vera ARM (88 cores)</div>
</div>
<div class="spec-item">
<div class="spec-label">HBM Memory</div>
<div class="spec-value">288GB HBM4</div>
</div>
<div class="spec-item">
<div class="spec-label">Memory BW</div>
<div class="spec-value">13 TB/s</div>
</div>
<div class="spec-item">
<div class="spec-label">FP4 Tensor</div>
<div class="spec-value">50 PFLOPS</div>
</div>
<div class="spec-item">
<div class="spec-label">NVLink</div>
<div class="spec-value">3.6 TB/s (7th gen)</div>
</div>
<div class="spec-item">
<div class="spec-label">Scale-up</div>
<div class="spec-value">144-GPU systems</div>
</div>
<div class="spec-item">
<div class="spec-label">Performance</div>
<div class="spec-value">3.3x vs Blackwell</div>
</div>
</div>
<div style="font-size: 11px; color: #a0a0a0; line-height: 1.4;">
<strong>Vision:</strong> <span class="highlight">Unified CPU-GPU</span>, HBM4 technology, autonomous AI systems
</div>
</div>
<div class="architecture-section" style="border-left-color: #9d4edd;">
<div class="arch-title">
<div class="arch-icon" style="background: #9d4edd;"></div>
Rubin Ultra (2027)
</div>
<div class="specs-grid">
<div class="spec-item">
<div class="spec-label">Architecture</div>
<div class="spec-value">4x GPU chiplets</div>
</div>
<div class="spec-item">
<div class="spec-label">Memory</div>
<div class="spec-value">1TB HBM4e</div>
</div>
<div class="spec-item">
<div class="spec-label">Memory BW</div>
<div class="spec-value">52 TB/s total</div>
</div>
<div class="spec-item">
<div class="spec-label">FP4 Performance</div>
<div class="spec-value">100 PFLOPS/pkg</div>
</div>
<div class="spec-item">
<div class="spec-label">System Scale</div>
<div class="spec-value">576 GPU dies</div>
</div>
<div class="spec-item">
<div class="spec-label">System BW</div>
<div class="spec-value">1.5 PB/s</div>
</div>
<div class="spec-item">
<div class="spec-label">Power</div>
<div class="spec-value">600kW+ rack</div>
</div>
<div class="spec-item">
<div class="spec-label">Performance</div>
<div class="spec-value">6x+ vs Blackwell</div>
</div>
</div>
<div style="font-size: 11px; color: #a0a0a0; line-height: 1.4;">
<strong>Ultimate:</strong> <span class="highlight">Chiplet design</span>, massive context AI, exascale systems
</div>
</div>
<div class="comparison-table">
<div class="table-title">Performance Evolution: Key Metrics Comparison</div>
<table>
<thead>
<tr>
<th>Metric</th>
<th>H200 (Hopper)</th>
<th>B200 (Blackwell)</th>
<th>Rubin (2026)</th>
<th>Rubin Ultra (2027)</th>
<th>Total Improvement</th>
</tr>
</thead>
<tbody>
<tr>
<td class="metric-name">FP8 Tensor Performance</td>
<td>3.96 PFLOPS</td>
<td>10 PFLOPS</td>
<td>25 PFLOPS</td>
<td>50 PFLOPS</td>
<td class="improvement">12.6x</td>
</tr>
<tr>
<td class="metric-name">FP4 Tensor Performance</td>
<td>Not supported</td>
<td>20 PFLOPS</td>
<td>50 PFLOPS</td>
<td>100 PFLOPS</td>
<td class="improvement">New capability</td>
</tr>
<tr>
<td class="metric-name">Memory Capacity</td>
<td>141GB HBM3e</td>
<td>192GB HBM3e</td>
<td>288GB HBM4</td>
<td>1TB HBM4e</td>
<td class="improvement">7.1x</td>
</tr>
<tr>
<td class="metric-name">Memory Bandwidth</td>
<td>4.8 TB/s</td>
<td>8 TB/s</td>
<td>13 TB/s</td>
<td>52 TB/s</td>
<td class="improvement">10.8x</td>
</tr>
<tr>
<td class="metric-name">NVLink Bandwidth</td>
<td>900 GB/s</td>
<td>1.8 TB/s</td>
<td>3.6 TB/s</td>
<td>1.5 PB/s (system)</td>
<td class="improvement">4x per GPU</td>
</tr>
<tr>
<td class="metric-name">Scale-up Configuration</td>
<td>8-GPU pods</td>
<td>72-GPU racks</td>
<td>144-GPU systems</td>
<td>576 GPU dies</td>
<td class="improvement">72x scale</td>
</tr>
<tr>
<td class="metric-name">Energy Efficiency</td>
<td>Baseline</td>
<td>25x better</td>
<td>~75x better</td>
<td>~150x better</td>
<td class="improvement">150x improvement</td>
</tr>
</tbody>
</table>
</div>
<div class="key-insights">
<div class="insights-title">Strategic Transformation Insights</div>
<div class="insights-grid">
<div class="insight-item">
<div class="insight-metric">208B</div>
<div class="insight-label">Transistors in Blackwell dual-die vs 80B in Hopper - 2.6x density breakthrough</div>
</div>
<div class="insight-item">
<div class="insight-metric">25x</div>
<div class="insight-label">Energy efficiency improvement for AI inference from Hopper to Blackwell</div>
</div>
<div class="insight-item">
<div class="insight-metric">FP4</div>
<div class="insight-label">New precision format in Blackwell doubling AI performance without accuracy loss</div>
</div>
<div class="insight-item">
<div class="insight-metric">3nm</div>
<div class="insight-label">Rubin's process node advancement enabling next-gen compute density</div>
</div>
<div class="insight-item">
<div class="insight-metric">HBM4</div>
<div class="insight-label">Memory technology in Rubin delivering 13TB/s bandwidth for massive models</div>
</div>
<div class="insight-item">
<div class="insight-metric">Annual</div>
<div class="insight-label">Release cadence accelerating AI infrastructure evolution vs historical 2-3 year cycles</div>
</div>
</div>
</div>
</div>
</div>
</body>
</html>
```Drag to resize
```html
<!DOCTYPE html>
<html lang="en">
<head>
<meta charset="UTF-8">
<meta name="viewport" content="width=device-width, initial-scale=1.0">
<title>NVIDIA GPU Generations Comparison</title>
<script src="https://cdn.jsdelivr.net/npm/chart.js"></script>
<style>
:root {
--hopper: #76b900;
--blackwell: #00BFFF;
--rubin: #FF69B4;
}
* {
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padding: 0;
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font-family: 'Segoe UI', Tahoma, Geneva, Verdana, sans-serif;
}
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color: #f8fafc;
padding: 20px;
min-height: 100vh;
}
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max-width: 1200px;
margin: 0 auto;
}
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text-align: center;
margin-bottom: 30px;
padding: 20px;
background: rgba(15, 23, 42, 0.7);
border-radius: 15px;
box-shadow: 0 10px 25px rgba(0, 0, 0, 0.3);
}
h1 {
font-size: 2.5rem;
margin-bottom: 10px;
background: linear-gradient(to right, var(--hopper), var(--blackwell), var(--rubin));
-webkit-background-clip: text;
background-clip: text;
color: transparent;
}
.subtitle {
font-size: 1.2rem;
color: #94a3b8;
max-width: 800px;
margin: 0 auto;
}
.cards-container {
display: grid;
grid-template-columns: repeat(auto-fit, minmax(350px, 1fr));
gap: 20px;
margin-bottom: 30px;
}
.card {
background: rgba(30, 41, 59, 0.7);
border-radius: 15px;
padding: 25px;
box-shadow: 0 8px 20px rgba(0, 0, 0, 0.2);
border: 1px solid rgba(255, 255, 255, 0.1);
transition: transform 0.3s ease, box-shadow 0.3s ease;
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width: 50px;
height: 50px;
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justify-content: center;
margin-right: 15px;
font-size: 1.5rem;
}
.hopper .card-icon { background: var(--hopper); }
.blackwell .card-icon { background: var(--blackwell); }
.rubin .card-icon { background: var(--rubin); }
.card-title {
font-size: 1.8rem;
font-weight: 700;
}
.card-subtitle {
color: #94a3b8;
font-size: 0.9rem;
}
.specs-grid {
display: grid;
grid-template-columns: 1fr 1fr;
gap: 15px;
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color: #cbd5e1;
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}
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}
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gap: 20px;
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font-size: 1.3rem;
margin-bottom: 15px;
color: #e2e8f0;
display: flex;
align-items: center;
}
.highlight-list {
list-style-type: none;
}
.highlight-list li {
margin-bottom: 12px;
padding-left: 25px;
position: relative;
}
.highlight-list li:before {
content: "✓";
position: absolute;
left: 0;
color: #76b900;
}
footer {
text-align: center;
margin-top: 40px;
padding: 20px;
color: #94a3b8;
font-size: 0.9rem;
}
@media (max-width: 768px) {
.cards-container {
grid-template-columns: 1fr;
}
.specs-grid {
grid-template-columns: 1fr;
}
}
</style>
</head>
<body>
<div class="container">
<header>
<h1>NVIDIA Data Center GPU Generations</h1>
<p class="subtitle">Hopper, Blackwell, and Rubin Architecture Comparison - Compute, Memory, and Interconnect Evolution</p>
</header>
<div class="cards-container">
<div class="card hopper">
<div class="card-header">
<div class="card-icon">H</div>
<div>
<h2 class="card-title">Hopper (H100)</h2>
<div class="card-subtitle">Current Generation - Released 2022</div>
</div>
</div>
<div class="specs-grid">
<div class="spec-item">
<div class="spec-name">Compute (FP8 Tensor)</div>
<div class="spec-value">~4 PFLOPS</div>
</div>
<div class="spec-item">
<div class="spec-name">Memory</div>
<div class="spec-value">80GB HBM3</div>
</div>
<div class="spec-item">
<div class="spec-name">Memory Bandwidth</div>
<div class="spec-value">3.35 TB/s</div>
</div>
<div class="spec-item">
<div class="spec-name">NVLink Speed</div>
<div class="spec-value">900 GB/s</div>
</div>
<div class="spec-item">
<div class="spec-name">Transistors</div>
<div class="spec-value">80 billion</div>
</div>
<div class="spec-item">
<div class="spec-name">Process Node</div>
<div class="spec-value">TSMC 4N</div>
</div>
</div>
</div>
<div class="card blackwell">
<div class="card-header">
<div class="card-icon">B</div>
<div>
<h2 class="card-title">Blackwell (B100/B200)</h2>
<div class="card-subtitle">2025 Release - Dual-Die Architecture</div>
</div>
</div>
<div class="specs-grid">
<div class="spec-item">
<div class="spec-name">Compute (FP8 Tensor)</div>
<div class="spec-value">10 PFLOPS</div>
</div>
<div class="spec-item">
<div class="spec-name">Memory</div>
<div class="spec-value">192GB HBM3e</div>
</div>
<div class="spec-item">
<div class="spec-name">Memory Bandwidth</div>
<div class="spec-value">8 TB/s</div>
</div>
<div class="spec-item">
<div class="spec-name">NVLink Speed</div>
<div class="spec-value">1.8 TB/s</div>
</div>
<div class="spec-item">
<div class="spec-name">Transistors</div>
<div class="spec-value">208 billion</div>
</div>
<div class="spec-item">
<div class="spec-name">Process Node</div>
<div class="spec-value">TSMC 4NP</div>
</div>
</div>
</div>
<div class="card rubin">
<div class="card-header">
<div class="card-icon">R</div>
<div>
<h2 class="card-title">Rubin (Future)</h2>
<div class="card-subtitle">2026+ - 3nm Process & HBM4</div>
</div>
</div>
<div class="specs-grid">
<div class="spec-item">
<div class="spec-name">Compute (FP8 Tensor)</div>
<div class="spec-value">25 PFLOPS</div>
</div>
<div class="spec-item">
<div class="spec-name">Memory</div>
<div class="spec-value">288GB HBM4</div>
</div>
<div class="spec-item">
<div class="spec-name">Memory Bandwidth</div>
<div class="spec-value">13 TB/s</div>
</div>
<div class="spec-item">
<div class="spec-name">NVLink Speed</div>
<div class="spec-value">3.6 TB/s</div>
</div>
<div class="spec-item">
<div class="spec-name">Transistors</div>
<div class="spec-value">TBD (3nm)</div>
</div>
<div class="spec-item">
<div class="spec-name">Process Node</div>
<div class="spec-value">TSMC 3nm</div>
</div>
</div>
</div>
</div>
<div class="chart-container">
<h2 class="chart-title">Performance Evolution: Hopper to Rubin</h2>
<canvas id="performanceChart"></canvas>
</div>
<div class="key-highlights">
<div class="highlight-card">
<h3 class="highlight-title">Key Architectural Improvements</h3>
<ul class="highlight-list">
<li>Dual-die design in Blackwell overcomes reticle limitations</li>
<li>3.3x performance improvement with Rubin generation</li>
<li>FP4 precision support in Blackwell for 2x AI performance</li>
<li>Annual release cadence accelerates innovation</li>
<li>Integration of custom ARM CPUs starting Rubin</li>
</ul>
</div>
<div class="highlight-card">
<h3 class="highlight-title">Memory & Interconnect Advancements</h3>
<ul class="highlight-list">
<li>HBM4 memory in Rubin with 13 TB/s bandwidth</li>
<li>2.4x memory bandwidth increase per generation</li>
<li>NVLink speed doubled from Hopper to Blackwell</li>
<li>10 TB/s NV-HBI inter-die link in Blackwell</li>
<li>Scaling to 576 GPU dies in single Rubin rack</li>
</ul>
</div>
<div class="highlight-card">
<h3 class="highlight-title">Target Workloads</h3>
<ul class="highlight-list">
<li>Trillion-parameter model training (Blackwell/Rubin)</li>
<li>Real-time reasoning systems (Rubin)</li>
<li>Multi-modal AI applications</li>
<li>Scientific computing and quantum simulation</li>
<li>Large-scale recommendation systems</li>
</ul>
</div>
</div>
<footer>
<p>NVIDIA Data Center GPU Evolution: Hopper → Blackwell → Rubin | Exponential Performance Growth for AI Infrastructure</p>
</footer>
</div>
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</html>
```Drag to resize
```html
<!DOCTYPE html>
<html lang="en">
<head>
<meta charset="utf-8">
<title>NVIDIA Data-Center GPU Evolution</title>
<style>
/*–– basic “consulting-deck” look ––*/
body {margin:0;font:16px/1.4 "Segoe UI",Arial,Helvetica,sans-serif;color:#333;}
.slide {width:1280px;height:720px;padding:40px 60px;box-sizing:border-box;}
h1 {margin:0 0 12px;color:#005587;font-size:34px;}
h2 {margin:28px 0 6px;color:#005587;font-size:22px;}
table {width:100%;border-collapse:collapse;font-size:14px;}
th,td {border:1px solid #d0d7df;padding:6px 8px;text-align:center;}
th {background:#f1f5f9;font-weight:600;}
tr.highlight td {background:#e7f1ff;font-weight:600;}
.small {font-size:12px;color:#666;margin-top:10px;}
/* column shading to improve scanability */
.colgroup th:nth-child(2),.colgroup td:nth-child(2){background:#eef5fb;}
.colgroup th:nth-child(3),.colgroup td:nth-child(3){background:#f8fbff;}
</style>
</head>
<body>
<div class="slide">
<h1>NVIDIA data-center GPU roadmap – key specification leapfrogs</h1>
<h2>1. Flagship GPU-on-module comparison (shipping / announced)</h2>
<table class="colgroup">
<tr>
<th rowspan="2">Key metric</th>
<th>Hopper H100<br>(2023)</th>
<th>Blackwell B200<br>(2025)</th>
<th>Rubin (2026 est.)</th>
</tr>
<tr>
<th>SXM5 80 GB</th>
<th>SXM6 192 GB</th>
<th>HBM4 288 GB</th>
</tr>
<tr>
<td>Process / transistor count</td>
<td>TSMC 4N – 80 B</td>
<td>TSMC 4NP – 208 B (dual-die)</td>
<td>TSMC 3 nm – >250 B (est.)</td>
</tr>
<tr class="highlight">
<td>Peak tensor compute</td>
<td>FP8 3.96 PFLOPS</td>
<td>FP8 10 PFLOPS<br>FP4 20 PFLOPS</td>
<td>FP8 25 PFLOPS<br>FP4 50 PFLOPS</td>
</tr>
<tr>
<td>HBM capacity</td>
<td>80 GB HBM3</td>
<td>192 GB HBM3e</td>
<td>288 GB HBM4</td>
</tr>
<tr>
<td>Memory bandwidth</td>
<td>3.35 TB/s</td>
<td>8 TB/s</td>
<td>13 TB/s</td>
</tr>
<tr>
<td>On-package / external interconnect</td>
<td>— / NVLink 0.9 TB/s</td>
<td>NV-HBI 10 TB/s / NVLink 1.8 TB/s</td>
<td>7ᵗʰ-gen NVLink 3.6 TB/s</td>
</tr>
<tr>
<td>Typical board TDP</td>
<td>700 W</td>
<td>1 kW</td>
<td>≈1.2 kW (est.)</td>
</tr>
<tr>
<td>Perf / watt vs H100</td>
<td>1.0 ×</td>
<td>≈2.5 ×</td>
<td>≈8 ×</td>
</tr>
</table>
<h2>2. Rack-scale reference systems (largest SKU announced)</h2>
<table>
<tr>
<th>Platform</th>
<th>GPU count</th>
<th>System compute</th>
<th>Total HBM</th>
<th>Rack NVLink BW</th>
<th>Power</th>
</tr>
<tr>
<td>DGX H100</td>
<td>8× H100</td>
<td>32 PFLOPS FP8</td>
<td>640 GB</td>
<td>7.2 TB/s</td>
<td><10 kW</td>
</tr>
<tr>
<td>GB200 NVL72</td>
<td>72× B200</td>
<td>720 PFLOPS FP8<br>1.44 EFLOPS FP4</td>
<td>13.4 TB</td>
<td>130 TB/s</td>
<td>≈120 kW</td>
</tr>
<tr>
<td>Rubin NVL144 (proj.)</td>
<td>144× Rubin</td>
<td>3.6 EFLOPS FP8<br>7.2 EFLOPS FP4</td>
<td>41 TB</td>
<td>≈300 TB/s</td>
<td>≈250 kW</td>
</tr>
</table>
<h2>3. What fundamentally changes each generation?</h2>
<ul>
<li><strong>Hopper ➜ Blackwell</strong>: first dual-die GPU breaks reticle limit, adds FP4 precision, 2.4 × memory BW, 2 × NVLink.</li>
<li><strong>Blackwell ➜ Rubin</strong>: moves to 3 nm & HBM4, integrated Vera CPU fabric, >3 × compute and >60 % more BW at similar perf/W.</li>
</ul>
<p class="small">Sources: NVIDIA public disclosures (2024-25); internal analysis. Figures are peak theoretical unless noted. Rubin specs are forward-looking and subject to change.</p>
</div>
</body>
</html>
```Drag to resize
```html
<!DOCTYPE html>
<html lang="en">
<head>
<meta charset="UTF-8">
<meta name="viewport" content="width=device-width, initial-scale=1.0">
<title>NVIDIA GPU Generation Comparison</title>
<link rel="preconnect" href="https://fonts.googleapis.com">
<link rel="preconnect" href="https://fonts.gstatic.com" crossorigin>
<link href="https://fonts.googleapis.com/css2?family=Roboto:wght@400;500;700&display=swap" rel="stylesheet">
<style>
body {
font-family: 'Roboto', 'Arial', sans-serif;
background-color: #f0f2f5;
margin: 0;
padding: 20px;
color: #333;
}
.slide-container {
max-width: 1400px;
margin: auto;
background-color: #ffffff;
border: 1px solid #d9d9d9;
box-shadow: 0 4px 12px rgba(0, 0, 0, 0.08);
padding: 40px 50px;
}
.slide-header h1 {
font-size: 28px;
font-weight: 700;
color: #003366; /* McKinsey Blue */
margin: 0 0 10px 0;
padding-bottom: 15px;
border-bottom: 4px solid #003366;
}
.slide-header .subtitle {
font-size: 17px;
font-weight: 400;
color: #595959;
margin-bottom: 30px;
max-width: 90%;
}
.comparison-table {
width: 100%;
border-collapse: collapse;
margin-bottom: 35px;
}
.comparison-table th,
.comparison-table td {
border: 1px solid #d9d9d9;
padding: 12px 15px;
vertical-align: top;
font-size: 15px;
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.comparison-table thead th {
background-color: #003366;
color: white;
font-size: 20px;
font-weight: 700;
text-align: center;
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font-size: 14px;
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.comparison-table .value {
font-weight: 700;
font-size: 1.1em;
color: #1f1f1f;
display: block;
}
.comparison-table .value.new-feature {
color: #137752; /* Green for new features */
}
.comparison-table .improvement {
color: #096dd9;
font-weight: 500;
font-size: 0.9em;
display: block;
margin-top: 5px;
}
.key-shifts-section {
display: grid;
grid-template-columns: repeat(3, 1fr);
gap: 25px;
margin-top: 20px;
}
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background-color: #f5f8fa;
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border-left: 5px solid #005f9e;
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}
</style>
</head>
<body>
<div class="slide-container">
<div class="slide-header">
<h1>NVIDIA's Generational GPU Leap: A Roadmap for Exascale AI</h1>
<p class="subtitle">An accelerated one-year cadence drives unprecedented performance gains across compute, memory, and interconnect, enabling trillion-parameter models and future AI agents.
</p>
</div>
<table class="comparison-table">
<thead>
<tr>
<th class="category-header">Key Specification</th>
<th>
Hopper
<span class="generation-subtitle">(H200, 2024 Refresh)</span>
</th>
<th>
Blackwell
<span class="generation-subtitle">(B200, Q1 2025)</span>
</th>
<th>
Rubin
<span class="generation-subtitle">(Announced, H2 2026)</span>
</th>
</tr>
</thead>
<tbody>
<tr>
<td class="metric-name">GPU Architecture</td>
<td>Monolithic Die (TSMC 4N)</td>
<td><span class="value">Dual-Die Chiplet</span><span class="improvement">Chiplet design overcomes reticle limits</span></td>
<td><span class="value">Advanced Chiplet (TSMC 3nm)</span><span class="improvement">Further integration & efficiency</span></td>
</tr>
<tr>
<td class="metric-name">Transistors</td>
<td><span class="value">80 Billion</span></td>
<td><span class="value">208 Billion</span><span class="improvement">2.6x vs. Hopper</span></td>
<td><span class="value">TBD (>300B est.)</span><span class="improvement">>1.5x vs. Blackwell (est.)</span></td>
</tr>
<tr>
<td rowspan="2" class="category-header">AI Compute (per GPU)</td>
<td class="metric-name">FP8 Performance</td>
<td><span class="value">~4 PFLOPS</span></td>
<td><span class="value">10 PFLOPS</span><span class="improvement">2.5x vs. Hopper</span></td>
<td><span class="value">25 PFLOPS</span><span class="improvement">2.5x vs. Blackwell</span></td>
</tr>
<tr>
<td class="metric-name">FP4 Performance</td>
<td><span class="value">-</span></td>
<td><span class="value new-feature">20 PFLOPS</span><span class="improvement">New capability</span></td>
<td><span class="value">50 PFLOPS</span><span class="improvement">2.5x vs. Blackwell</span></td>
</tr>
<tr>
<td rowspan="2" class="category-header">High Bandwidth Memory (HBM)</td>
<td class="metric-name">Capacity per GPU</td>
<td><span class="value">141 GB</span><span class="improvement">HBM3e</span></td>
<td><span class="value">192 GB</span><span class="improvement">1.4x vs. Hopper (H200)</span></td>
<td><span class="value">288 GB</span><span class="improvement">1.5x vs. Blackwell (via HBM4)</span></td>
</tr>
<tr>
<td class="metric-name">Bandwidth per GPU</td>
<td><span class="value">4.8 TB/s</span></td>
<td><span class="value">8 TB/s</span><span class="improvement">1.7x vs. Hopper (H200)</span></td>
<td><span class="value">13 TB/s</span><span class="improvement">1.6x vs. Blackwell</span></td>
</tr>
<tr>
<td rowspan="2" class="category-header">Scale-Up Interconnect</td>
<td class="metric-name">NVLink Bandwidth (GPU-to-GPU)</td>
<td><span class="value">900 GB/s</span><span class="improvement">4th Gen</span></td>
<td><span class="value">1.8 TB/s</span><span class="improvement">2x vs. Hopper (5th Gen)</span></td>
<td><span class="value">3.6 TB/s</span><span class="improvement">2x vs. Blackwell (7th Gen)</span></td>
</tr>
<tr>
<td class="metric-name">Maximum Scale-Up Size (Single System)</td>
<td><span class="value">16 GPUs</span><span class="improvement">DGX H100 SuperPOD</span></td>
<td><span class="value">72 GPUs</span><span class="improvement">4.5x GPU density (GB200 NVL72)</span></td>
<td><span class="value">144 GPUs</span><span class="improvement">2x GPU density (Rubin NVL144)</span></td>
</tr>
</tbody>
</table>
<div class="key-shifts-section">
<div class="shift-box">
<h3>1. Design & Manufacturing Evolution</h3>
<p>The progression moves from a single large die (Hopper) to a dual-die chiplet design (Blackwell) to beat manufacturing limits, culminating in an advanced multi-chiplet architecture on a next-gen 3nm process with Rubin. This enables exponential transistor growth per generation.</p>
</div>
<div class="shift-box">
<h3>2. Compute Efficiency through Precision</h3>
<p>Blackwell introduces the FP4 data format, doubling AI inference performance over FP8 with minimal accuracy loss. This trend continues with Rubin, indicating a strategic focus on optimizing compute efficiency for massive-scale models by leveraging lower precision arithmetic.</p>
</div>
<div class="shift-box">
<h3>3. System-Level Integration at Scale</h3>
<p>The focus expands from individual GPUs to tightly integrated rack-scale systems. The GB200 Superchip (2x GPU + CPU) and Rubin's integration with the new "Vera" CPU demonstrate a holistic approach to minimize bottlenecks in memory, compute, and networking for exascale AI.</p>
</div>
</div>
<div class="footer">
Source: Analysis based on NVIDIA public announcements and user-provided specifications.
</div>
</div>
</body>
</html>
```Drag to resize
```html
<!DOCTYPE html>
<html lang="en">
<head>
<meta charset="UTF-8" />
<meta name="viewport" content="width=device-width, initial-scale=1.0"/>
<title>NVIDIA GPU Architecture Evolution: Hopper → Blackwell → Rubin</title>
<link href="https://fonts.googleapis.com/css2?family=Helvetica Neue&display=swap" rel="stylesheet">
<style>
body {
font-family: 'Helvetica Neue', sans-serif;
margin: 0;
padding: 0;
background: #f4f4f4;
color: #333;
line-height: 1.5;
}
.slide {
width: 1200px;
margin: 20px auto;
padding: 20px;
background: white;
box-shadow: 0 4px 12px rgba(0,0,0,0.15);
position: relative;
}
.header {
display: flex;
justify-content: space-between;
align-items: flex-start;
border-bottom: 1px solid #ddd;
padding-bottom: 12px;
margin-bottom: 20px;
}
.title {
font-size: 28px;
font-weight: bold;
color: #000;
margin: 0;
}
.subtitle {
font-size: 18px;
color: #444;
margin: 4px 0 0 0;
}
.footer {
position: absolute;
bottom: 15px;
right: 20px;
font-size: 14px;
color: #888;
}
.section-title {
font-size: 20px;
font-weight: bold;
margin: 20px 0 12px 0;
color: #000;
border-left: 4px solid #005A9E;
padding-left: 10px;
}
table {
width: 100%;
border-collapse: collapse;
font-size: 13.5px;
margin: 15px 0;
}
th {
background-color: #005A9E;
color: white;
padding: 10px;
text-align: left;
font-weight: bold;
}
td {
padding: 10px;
border-bottom: 1px solid #ddd;
vertical-align: top;
}
tr:nth-child(even) {
background-color: #f9f9f9;
}
.highlight {
font-weight: bold;
color: #D00;
}
.comparison-table th:nth-child(n+2) {
width: 12%;
}
.gen-label {
display: inline-block;
padding: 2px 6px;
border-radius: 3px;
color: white;
font-size: 14px;
font-weight: bold;
margin-right: 5px;
}
.hopper { background: #005A9E; }
.blackwell { background: #A6006B; }
.rubin { background: #D00; }
.metric-badge {
background: #eee;
border: 1px solid #ccc;
border-radius: 3px;
padding: 3px 6px;
font-size: 12px;
display: inline-block;
margin-right: 6px;
}
.arrow {
font-weight: bold;
color: #007C3F;
}
.note {
font-size: 12px;
color: #666;
font-style: italic;
}
.flex {
display: flex;
gap: 15px;
}
.flex-item {
flex: 1;
}
.tech-bullet {
margin: 8px 0;
font-size: 13.5px;
}
.header-logo {
font-size: 16px;
color: #005A9E;
font-weight: bold;
}
</style>
</head>
<body>
<div class="slide">
<!-- Header -->
<div class="header">
<div>
<p class="title">NVIDIA Data Center GPU Evolution</p>
<p class="subtitle">Hopper (2022–2024) → Blackwell (2025) → Rubin (2026)</p>
</div>
<div class="header-logo">NVIDIA INTERNAL</div>
</div>
<!-- Core Architecture Comparison -->
<div class="section-title">▲ Core Architecture Comparison</div>
<table>
<thead>
<tr>
<th>Metric</th>
<th class="hopper">Hopper<br/>(H200)</th>
<th class="blackwell">Blackwell<br/>(B200/GB200)</th>
<th class="rubin">Rubin<br/>(2026)</th>
</tr>
</thead>
<tbody>
<tr>
<td><strong>Process Node</strong></td>
<td>TSMC 4N</td>
<td>TSMC 4NP (Enhanced)</td>
<td>TSMC 3nm</td>
</tr>
<tr>
<td><strong>Transistors</strong></td>
<td>80B</td>
<td>208B (per die)<br/>Dual-die design</td>
<td>3nm density + chiplets<br/>(up to 832B/package)</td>
</tr>
<tr>
<td><strong>Die Configuration</strong></td>
<td>Single die</td>
<td><span class="highlight">Dual-die (NV-HBI 10 TB/s)</span></td>
<td>Single or 4× chiplets</td>
</tr>
<tr>
<td><strong>CPU Integration</strong></td>
<td>None (discrete GPUs)</td>
<td>Grace ARM CPU coupled<br/>(NVLink-C2C)</td>
<td>Tightly integrated <span class="highlight">Vera 88-core ARM CPU</span></td>
</tr>
</tbody>
</table>
<!-- Compute & Precision -->
<div class="section-title">▲ Compute Performance & Precision</div>
<table class="comparison-table">
<thead>
<tr>
<th>Floating Point Type</th>
<th class="hopper">Hopper (H200)</th>
<th class="blackwell">Blackwell (B200)</th>
<th class="rubin">Rubin (est.)</th>
<th>Gain vs. Hopper</th>
</tr>
</thead>
<tbody>
<tr>
<td><strong>FP32</strong></td>
<td>67 TFLOPS</td>
<td>80 TFLOPS</td>
<td>~160 TFLOPS</td>
<td class="arrow">→ 2.4×</td>
</tr>
<tr>
<td><strong>FP16/BF16 Tensor</strong></td>
<td>1.98 PFLOPS</td>
<td>5.0 PFLOPS</td>
<td>~15 PFLOPS</td>
<td class="arrow">→ 7.6×</td>
</tr>
<tr>
<td><strong>FP8 Tensor</strong></td>
<td>3.96 PFLOPS</td>
<td>10.0 PFLOPS</td>
<td>25.0 PFLOPS</td>
<td class="arrow">→ 6.3×</td>
</tr>
<tr>
<td><strong>FP4 Tensor</strong></td>
<td>N/A</td>
<td>20.0 PFLOPS<br/>(2nd-gen Transformer Engine)</td>
<td>50.0 PFLOPS<br/>(Rubin Ultra: 100 PFLOPS)</td>
<td class="arrow">→ >50×</td>
</tr>
</tbody>
</table>
<p class="note">*FP4 enables 2× throughput over FP8 without accuracy loss via adaptive quantization</p>
<!-- Memory & Bandwidth -->
<div class="section-title">▲ Memory & Bandwidth</div>
<table>
<thead>
<tr>
<th>Metric</th>
<th class="hopper">Hopper (H200)</th>
<th class="blackwell">Blackwell (B200)</th>
<th class="rubin">Rubin (est.)</th>
</tr>
</thead>
<tbody>
<tr>
<td><strong>Memory Type</strong></td>
<td>HBM3e</td>
<td>HBM3e</td>
<td><span class="highlight">HBM4</span></td>
</tr>
<tr>
<td><strong>Per-GPU Capacity</strong></td>
<td>141GB</td>
<td>192GB</td>
<td>288GB (Ultra: up to 1TB)</td>
</tr>
<tr>
<td><strong>Memory Bandwidth</strong></td>
<td>4.8 TB/s</td>
<td>8.0 TB/s</td>
<td><span class="highlight">13.0 TB/s</span><br/>(Ultra: 52 TB/s aggregate)</td>
</tr>
<tr>
<td><strong>Cache Hierarchy</strong></td>
<td>50MB L2</td>
<td>100MB L2</td>
<td>200MB+ L2 with unified GPU-CPU cache</td>
</tr>
</tbody>
</table>
<!-- Interconnect & Scale Up -->
<div class="section-title">▲ Interconnect & Scale-Up Capabilities</div>
<table>
<thead>
<tr>
<th>Feature</th>
<th class="hopper">Hopper</th>
<th class="blackwell">Blackwell</th>
<th class="rubin">Rubin</th>
</tr>
</thead>
<tbody>
<tr>
<td><strong>GPU-GPU Interconnect</strong></td>
<td>NVLink 4.0<br/>900 GB/s</td>
<td><span class="highlight">NVLink 5.0<br/>1.8 TB/s</span></td>
<td>NVLink 6.0/7.0<br/>3.6 TB/s</td>
</tr>
<tr>
<td><strong>CPU-GPU (C2C)</strong></td>
<td>PCIe Gen5 / NVLink (limited)</td>
<td>Grace CPU: <br/>900 GB/s C2C (NVLink)</td>
<td><span class="highlight">Vera: 1.8 TB/s C2C + cache-coherent</span></td>
</tr>
<tr>
<td><strong>On-Die Interconnect</strong></td>
<td>Unified memory fabric</td>
<td><span class="highlight">NV-HBI 10 TB/s</span><br/>(die-to-die)</td>
<td>Next-gen HBI or EMI<br/>(>10 TB/s)</td>
</tr>
<tr>
<td><strong>Scale-Up World Size</strong></td>
<td>Max: NVL (6× H100)</td>
<td><span class="highlight">GB200 NVL72 = 72× B200</span><br/>1.4 exaflops (FP4), 120kW/rack</td>
<td><span class="highlight">NVL144 → NVL576</span><br/>Supports 576 GPU dies (Rubin Ultra)</td>
</tr>
</tbody>
</table>
<!-- Key Features by Generation -->
<div class="section-title">▲ Key Technological Innovations</div>
<div class="flex">
<div class="flex-item">
<div style="background: #f0f8ff; padding: 12px; border-radius: 6px;">
<span class="gen-label hopper">Hopper</span>
<div class="tech-bullet">• 4th-gen Tensor Cores with structured sparsity</div>
<div class="tech-bullet">• Transformer Engine (FP8/FP16 dynamic precision)</div>
<div class="tech-bullet">• Confidential Computing (secure AI workloads)</div>
<div class="tech-bullet">• MIG: 7 instances per GPU</div>
</div>
</div>
<div class="flex-item">
<div style="background: #fff0f8; padding: 12px; border-radius: 6px;">
<span class="gen-label blackwell">Blackwell</span>
<div class="tech-bullet">• Dual-die design overcomes reticle limit</div>
<div class="tech-bullet">• <strong>FP4 precision</strong> for 2× inference throughput</div>
<div class="tech-bullet">• <strong>10 TB/s NV-HBI</strong> die-to-die interconnect</div>
<div class="tech-bullet">• Integrated <strong>RAS Engine</strong> (predictive maintenance)</div>
<div class="tech-bullet">• Decompression Engine (6× faster database ops)</div>
</div>
</div>
<div class="flex-item">
<div style="background: #ffe5e5; padding: 12px; border-radius: 6px;">
<span class="gen-label rubin">Rubin</span>
<div class="tech-bullet">• Migrates to <strong>TSMC 3nm</strong> for efficiency</div>
<div class="tech-bullet">• <strong>HBM4</strong> (13 TB/s bandwidth)</div>
<div class="tech-bullet">• <strong>Vera ARM CPU</strong>: 88-core, fully integrated</div>
<div class="tech-bullet">• <strong>Disaggregated compute</strong> (prefill/decode)</div>
<div class="tech-bullet">• Target: <strong>8× better efficiency</strong> vs. Hopper</div>
</div>
</div>
</div>
<!-- Performance Trajectory -->
<div class="section-title">▲ Performance Trajectory (Projected)</div>
<table>
<thead>
<tr>
<th>Capability</th>
<th>Hopper Base (H100)</th>
<th>Blackwell (B200)</th>
<th>Rubin (2026)</th>
</tr>
</thead>
<tbody>
<tr>
<td><strong>Average Compute Gain</strong></td>
<td>1.0×</td>
<td>2.5–3.0×</td>
<td><span class="highlight">3.3× vs. Blackwell (8–9× vs. Hopper)</span></td>
</tr>
<tr>
<td><strong>Memory Bandwidth</strong></td>
<td>3.35 TB/s (HBM3)</td>
<td>8.0 TB/s</td>
<td>13.0 TB/s (HBM4)</td>
</tr>
<tr>
<td><strong>Scale-Up System</strong></td>
<td>NVL (6 GPUs)</td>
<td>GB200 NVL72 (72× B200)</td>
<td>NVL576 (576 GPU dies)</td>
</tr>
<tr>
<td><strong>Power Efficiency</strong></td>
<td>Baseline</td>
<td>2.5–3×</td>
<td><span class="highlight">~8×</span> (vs. Hopper)</td>
</tr>
</tbody>
</table>
<!-- Footer -->
<div class="footer">Confidential – NVIDIA Strategic Planning | Q2 2025 Roadmap</div>
</div>
</body>
</html>
```Drag to resize
```html
<!DOCTYPE html>
<html lang="en">
<head>
<meta charset="UTF-8">
<title>NVIDIA Data‑Center GPU Evolution – Hopper, Blackwell & Rubin</title>
<style>
body{
background:#fafafa;
font-family:Arial,Helvetica,sans-serif;
color:#222;
margin:0;
padding:0;
}
.slide{
max-width:1280px;
margin:40px auto;
padding:20px;
background:white;
box-shadow:0 4px 12px rgba(0,0,0,.1);
border-radius:8px;
}
h1{font-size:28px;margin-bottom:4px;}
h2{font-size:20px;margin-top:12px;margin-bottom:12px;color:#0066cc;}
.grid{
display:grid;
grid-template-columns:1fr 1fr 1fr 1fr;
gap:12px;
align-items:center;
}
.grid-header{
font-weight:bold;
text-align:center;
background:#0066cc;
color:white;
padding:8px 0;
border-radius:4px;
}
.grid-cell{
text-align:center;
padding:8px 4px;
font-size:14px;
}
.grid-row:nth-child(even){
background:#f7f7f7;
}
.grid-row:nth-child(odd){
background:#eaeaea;
}
.grid-top{
font-weight:bold;
background:#0099ff;
color:white;
}
.highlight{
background:#ffd700;
font-weight:bold;
}
@media(max-width:900px){
.grid{grid-template-columns:1fr;}
.grid-header{display:block;}
}
</style>
</head>
<body>
<div class="slide">
<h1>NVIDIA Data‑Center GPU Evolution</h1>
<h2>Compute, Memory, Interconnect & Scale – Hopper → Blackwell → Rubin</h2>
<div class="grid">
<!-- Header -->
<div class="grid-header">Specification</div>
<div class="grid-header">Hopper (H100)</div>
<div class="grid-header">Blackwell (B200)</div>
<div class="grid-header">Rubin (2026)</div>
<!-- Compute -->
<div class="grid-cell">FP32 (Tensor‑core negated)</div>
<div class="grid-cell highlight">67 TFLOPS</div>
<div class="grid-cell highlight">80 TFLOPS</div>
<div class="grid-cell highlight">~160 TFLOPS</div>
<div class="grid-cell">FP8 Tensor Performance</div>
<div class="grid-cell">3.96 PFLOPS</div>
<div class="grid-cell">10 PFLOPS</div>
div class="grid-cell">25 PFLOPS</div>
<div class="grid-cell">FP4 Tensor Performance (new)</div>
<div class="grid-cell">—</div>
<div class="grid-cell highlight">20 PFLOPS</div>
<div class="grid-cell highlight">50 PFLOPS</div>
<!-- Memory -->
<div class="grid-cell">HBM memory capacity</div>
<div class="grid-cell">80 GB</div>
<div class="grid-cell highlight">192 GB</div>
<div class="grid-cell highlight">288 GB</div>
<div class="grid-cell">HBM bandwidth</div>
<div class="grid-cell">3.35 TB/s</div>
<div class="grid-cell highlight">8 TB/s</div>
<div class="grid-cell highlight">13 TB/s</div>
<!-- Interconnect -->
<div class="grid-cell">NVLink speed</div>
<div class="grid-cell highlight">900 GB/s</div>
<div class="grid-cell highlight">1.8 TB/s</div>
<div class="grid-cell highlight">3.6 TB/s</div>
<div class="grid-cell">NVLink scale (per node)</div>
<div class="grid-cell">4×8 TB/s</div>
<div class="grid-cell highlight">8×8 TB/s (dual die)</div>
<div class="grid-cell highlight">576 TB/s (NVL576)</div>
<!-- Scale / Power -->
<div class="grid-cell">Typical power envelope</div>
<div class="grid-cell">700 W (SXM)</div>
<div class="grid-cell highlight">1 000 W</div>
<div class="grid-cell highlight">600 kW+ (full rack)</div>
<div class="grid-cell">Transistor count</div>
<div class="grid-cell">80 B</div>
<div class="grid-cell highlight">208 B (dual‑die)</div>
<div class="grid-cell highlight">TBD (3 nm)</div>
<!-- Software / Misc -->
<div class="grid-cell">Transformer Engine (precision)</div>
<div class="grid-cell">FP8/FP16</div>
<div class="grid-cell highlight">FP4/FP8</div>
<div class="grid-cell highlight">FP4/FP8</div>
<div class="grid-cell">AI‑specific FP8/F8 support</div>
<div class="grid-cell">3.96 PFLOPS (FP8)</div>
<div class="grid-cell highlight">10 PFLOPS</div>
<div class="grid-cell highlight">25 PFLOPS</div>
</div>
</div>
</body>
</html>
```Drag to resize
```html
<!DOCTYPE html>
<html lang="en">
<head>
<meta charset="UTF-8"/>
<title>NVIDIA Data-Center GPU Evolution – 2024-2027</title>
<style>
@import url('https://fonts.googleapis.com/css2?family=Inter:wght@400;600;700&display=swap');
:root{
--hopper:#0071bc;
--blackwell:#2ca02c;
--rubin:#d7301f;
--grey:#e6e6e6;
}
body{
margin:0;
font-family:Inter, sans-serif;
background:#f7f7f7;
display:flex;
justify-content:center;
padding:40px 0;
}
.slide{
width:1440px;
height:810px;
background:#ffffff;
box-shadow:0 8px 24px rgba(0,0,0,.15);
padding:48px;
box-sizing:border-box;
display:flex;
flex-direction:column;
}
header h1{
font-size:36px;
font-weight:700;
margin:0;
line-height:1.2;
}
header p{
font-size:20px;
margin:0;
color:#555;
margin-bottom:24px;
}
table{
width:100%;
border-spacing:0;
font-size:12px;
}
th{
background:#fafafa;
font-weight:700;
padding:6px 8px;
position:sticky;
top:0;
}
td{
padding:6px 8px;
border-bottom:1px solid var(--grey);
text-align:center;
vertical-align:middle;
}
tbody tr:hover{background:#fafafa;}
.unit{font-size:9px;color:#565656;margin-left:2px;}
.capsule{
display:inline-block;
color:#fff;
padding:4px 8px;
border-radius:20px;
font-weight:600;
font-size:11px;
min-width:50px;
}
.capsule.hopper{background:var(--hopper);}
.capsule.blackwell{background:var(--blackwell);}
.capsule.rubin{background:var(--rubin);}
.chart{
flex-grow:1;
margin-top:24px;
position:relative;
}
</style>
</head>
<body>
<div class="slide">
<header>
<h1>The Dawn of Exascale AI:</h1>
<p>Hopper → Blackwell → Rubin</p>
</header>
<table>
<thead>
<tr>
<th style="width:120px;text-align:left">Key Metrics</th>
<th>H100 SXM5<br><span class="capsule hopper">Hopper</span></th>
<th>H200 SXM5<br><span class="capsule hopper">Hopper +</span></th>
<th>B200<br><span class="capsule blackwell">Blackwell</span></th>
<th>GB200 NVL72<br><span class="capsule blackwell">Blackwell Sys</span></th>
<th>Rubin (2026)<br><span class="capsule rubin">Rubin</span></th>
</tr>
</thead>
<tbody>
<tr>
<td style="text-align:left;font-weight:600;">EVOLVE<br>Compute (FP8)<br><span class="unit">PFLOPS</span></td>
<td>3.96</td>
<td>3.96</td>
<td>10</td>
<td>720 <span style="color:#555">(rack)</span></td>
<td>25</td>
</tr>
<tr>
<td style="text-align:left;font-weight:600;">EVOLVE<br>Compute (FP4)<br><span class="unit">PFLOPS</span></td>
<td>—</td>
<td>—</td>
<td>20</td>
<td>1,440 <span style="color:#555">(rack)</span></td>
<td>50</td>
</tr>
<tr>
<td style="text-align:left;font-weight:600;">ACCELERATE<br>HBM Capacity<br><span class="unit">GB</span></td>
<td>80</td>
<td>141</td>
<td>192</td>
<td>13,400 <span style="color:#555">(HBM3e total)</span></td>
<td>288 (HBM4)</td>
</tr>
<tr>
<td style="text-align:left;font-weight:600;">ACCELERATE<br>Memory Bandwidth<br><span class="unit">TB/s</span></td>
<td>3.35</td>
<td>4.8</td>
<td>8</td>
<td>576 <span style="color:#555">(rack)</span></td>
<td>13</td>
</tr>
<tr>
<td style="text-align:left;font-weight:600;">SCALE UP<br>NVLink Speed<br><span class="unit">GB/s</span></td>
<td>900</td>
<td>900</td>
<td>1,800</td>
<td>130,000 <span style="color:#555">(rack aggregate)</span></td>
<td>3,600 (Gen 7)</td>
</tr>
<tr>
<td style="text-align:left;font-weight:600;">SCALE UP<br>World-Size Scale<br><span class="unit"># GPUs / Dies</span></td>
<td>—</td>
<td>—</td>
<td>2-die package<br>208 B trans</td>
<td>270 GPUs<br>1.4 EFLOPS super-node</td>
<td>144 GPUs NVL144<br>576 dies Ultra</td>
</tr>
</tbody>
</table>
<div class="chart">
<canvas id="opsChart" height="220"></canvas><br>
<canvas id="memChart" height="220"></canvas>
</div>
</div>
<!-- Chart.js CDN -->
<script src="https://cdn.jsdelivr.net/npm/chart.js"></script>
<script>
const lbl = ['H100','H200','B200','Rubin'];
new Chart(document.getElementById('opsChart'),{
type:'bar',
data:{
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},
options:{
plugins:{legend:{position:'top'},title:{display:true,text:'Compute Density (Single GPU / Chiplet)',font:{size:14},padding:0}},
responsive:false,
maintainAspectRatio:false,
scales:{y:{beginAtZero:true,title:{display:true,text:'PFLOPS'}}}
}
});
new Chart(document.getElementById('memChart'),{
type:'bar',
data:{
labels:lbl,
datasets:[
{label:'HBM Capacity (GB)',data:[80,141,192,288],backgroundColor:['#0071bc','#0071bc','#2ca02c','#d7301f'],barPercentage:0.8},
{label:'Memory Bandwidth (TB/s)',data:[3.35,4.8,8,13],backgroundColor:['rgba(0,113,188,.5)','rgba(0,113,188,.5)','#2ca02c','#d7301f'],barPercentage:0.8}
]
},
options:{
plugins:{legend:{position:'top'},title:{display:true,text:'Memory Vault',font:{size:14}}},
responsive:false,
maintainAspectRatio:false,
scales:{y:{beginAtZero:true}}
}
});
</script>
</body>
</html>
```Drag to resize
```html
<!DOCTYPE html>
<html lang="en">
<head>
<meta charset="UTF-8">
<meta name="viewport" content="width=device-width, initial-scale=1.0">
<title>Nvidia GPU Generations: Hopper, Blackwell, Rubin</title>
<style>
body {
font-family: Arial, sans-serif;
background-color: #f4f4f4;
color: #333;
margin: 0;
padding: 20px;
display: flex;
justify-content: center;
align-items: center;
min-height: 100vh;
}
.slide-container {
background-color: white;
border: 1px solid #ddd;
box-shadow: 0 0 10px rgba(0,0,0,0.1);
padding: 40px;
max-width: 1200px;
width: 100%;
}
h1 {
text-align: center;
color: #005b96;
margin-bottom: 20px;
}
h2 {
color: #005b96;
margin-top: 30px;
margin-bottom: 10px;
}
table {
width: 100%;
border-collapse: collapse;
margin-bottom: 20px;
}
th, td {
border: 1px solid #ddd;
padding: 8px;
text-align: left;
}
th {
background-color: #005b96;
color: white;
text-align: center;
}
.highlight {
background-color: #e6f3ff;
}
.difference-section {
margin-top: 20px;
}
ul {
list-style-type: disc;
padding-left: 20px;
}
.footer {
text-align: center;
font-size: 12px;
color: #666;
margin-top: 30px;
}
</style>
</head>
<body>
<div class="slide-container">
<h1>Nvidia Data Center GPU Generations: Hopper, Blackwell, Rubin</h1>
<p style="text-align: center; font-style: italic;">McKinsey-Style Comparison: Focus on Compute, HBM, Scale-Up World Size, Interconnect, Memory Bandwidth</p>
<h2>Key Specifications Comparison (Representative Models)</h2>
<table>
<thead>
<tr>
<th>Metric</th>
<th>Hopper (H100/H200)</th>
<th>Blackwell (B200/GB200)</th>
<th>Rubin (2026/Rubin Ultra 2027)</th>
<th>Blackwell vs. Hopper Improvement</th>
<th>Rubin vs. Blackwell Improvement</th>
</tr>
</thead>
<tbody>
<tr class="highlight">
<td><strong>Compute: FP32 TFLOPS</strong></td>
<td>67 (H100) / 67 (H200)</td>
<td>80 (B200) / 160 (GB200)</td>
<td>~160 / ~320 (Ultra est.)</td>
<td>1.2x</td>
<td>2x</td>
</tr>
<tr>
<td><strong>Compute: FP16/BF16 Tensor PFLOPS</strong></td>
<td>1.98 (H100) / 1.98 (H200)</td>
<td>5 (B200) / 10 (GB200)</td>
<td>~15 / ~30 (Ultra est.)</td>
<td>2.5x</td>
<td>3x</td>
</tr>
<tr class="highlight">
<td><strong>Compute: FP8 Tensor PFLOPS</strong></td>
<td>3.96 (H100) / 3.96 (H200)</td>
<td>10 (B200) / 20 (GB200)</td>
<td>25 / 50 (Ultra)</td>
<td>2.5x</td>
<td>2.5x</td>
</tr>
<tr>
<td><strong>Compute: FP4 Tensor PFLOPS</strong></td>
<td>N/A</td>
<td>20 (B200) / 40 (GB200)</td>
<td>50 / 100 (Ultra)</td>
<td>New (2x over FP8)</td>
<td>2.5x</td>
</tr>
<tr class="highlight">
<td><strong>HBM Memory Capacity</strong></td>
<td>80GB HBM3 (H100) / 141GB HBM3e (H200)</td>
<td>192GB HBM3e (B200) / 384GB (GB200)</td>
<td>288GB HBM4 / 1TB HBM4e (Ultra)</td>
<td>2.4x (vs H100)</td>
<td>1.5x / 5.2x (Ultra)</td>
</tr>
<tr>
<td><strong>Memory Bandwidth</strong></td>
<td>3.35 TB/s (H100) / 4.8 TB/s (H200)</td>
<td>8 TB/s (B200) / 16 TB/s (GB200)</td>
<td>13 TB/s / 52 TB/s (Ultra)</td>
<td>2.4x (vs H100)</td>
<td>1.6x / 3.3x (Ultra)</td>
</tr>
<tr class="highlight">
<td><strong>Scale-Up World Size</strong> (Max GPUs/System)</td>
<td>Up to 256 GPUs (DGX H100) / MIG 7 instances</td>
<td>NVL72 (72 GPUs) / 1.4 exaflops inference</td>
<td>NVL144 (144 GPUs) / NVL576 (576 dies, Ultra)</td>
<td>~2-3x scale (rack-level)</td>
<td>2x / 4x (Ultra)</td>
</tr>
<tr>
<td><strong>Interconnect: NVLink Speed</strong></td>
<td>900 GB/s (H100/H200)</td>
<td>1.8 TB/s (B200) / 3.6 TB/s (GB200)</td>
<td>3.6 TB/s / 1.5 PB/s system (Ultra)</td>
<td>2x</td>
<td>2x / 400x system (Ultra)</td>
</tr>
<tr class="highlight">
<td><strong>Transistors / Process</strong></td>
<td>80B / TSMC 4N</td>
<td>208B (dual-die) / TSMC 4NP</td>
<td>TBD (single/4x chiplets) / TSMC 3nm</td>
<td>2.6x transistors</td>
<td>Process shrink + chiplets</td>
</tr>
<tr>
<td><strong>Power Efficiency</strong></td>
<td>Baseline (700W TDP)</td>
<td>2.5x better (1000W TDP)</td>
<td>~8x better (TBD)</td>
<td>2.5x</td>
<td>3.2x</td>
</tr>
</tbody>
</table>
<h2>Important Differences and Architectural Evolutions</h2>
<div class="difference-section">
<ul>
<li><strong>Hopper to Blackwell:</strong> Dual-die design (208B transistors vs. 80B) enables 2.5x compute leap; Introduces FP4 precision for 2x inference efficiency; Memory bandwidth doubles to 8 TB/s; NVLink to 1.8 TB/s supports larger scale-up (e.g., NVL72 with 72 GPUs).</li>
<li><strong>Blackwell to Rubin:</strong> 3nm process + HBM4 yields 3.3x performance; Integrated Vera ARM CPUs (88 cores); Ultra variant with 4x chiplets scales to 576 dies/rack; Bandwidth to 13 TB/s, interconnect to 3.6 TB/s per GPU (1.5 PB/s system).</li>
<li><strong>Overall Trends:</strong> Exponential scaling: 900x perf gain Hopper to Rubin; Annual cadence accelerates innovation; Focus shifts from training (Hopper) to inference/trillion-param models (Blackwell) to AI reasoning/agents (Rubin).</li>
</ul>
</div>
<div class="footer">
Data sourced from Nvidia announcements. Estimates based on provided roadmap. For strategic AI infrastructure planning.
</div>
</div>
</body>
</html>
```Drag to resize
Here's a McKinsey-style slide with the key specifications and differences between Nvidia's Hopper, Blackwell, and Rubin GPU generations:
```html
<!DOCTYPE html>
<html>
<head>
<title>Nvidia Data Center GPU Generations Comparison</title>
<link href="https://fonts.googleapis.com/css2?family=Roboto:wght@300;400;500;700&display=swap" rel="stylesheet">
<style>
body {
font-family: 'Roboto', sans-serif;
margin: 0;
padding: 20px;
color: #333;
background-color: #f5f7fa;
}
.slide-container {
width: 900px;
background: white;
border-radius: 8px;
box-shadow: 0 4px 12px rgba(0,0,0,0.1);
padding: 25px;
margin: 0 auto;
}
h1 {
color: #2a5885;
margin-top: 0;
font-size: 28px;
border-bottom: 2px solid #e0e0e0;
padding-bottom: 10px;
}
h2 {
color: #357ab8;
font-size: 20px;
margin-top: 30px;
}
.tech-grid {
display: grid;
grid-template-columns: repeat(3, 1fr);
gap: 15px;
margin-top: 20px;
}
.tech-card {
background: #f9f9f9;
border-radius: 6px;
padding: 15px;
border-left: 4px solid #357ab8;
}
.tech-card h3 {
margin-top: 0;
color: #2a5885;
font-size: 16px;
}
table {
width: 100%;
border-collapse: collapse;
margin: 20px 0;
font-size: 14px;
}
th {
background-color: #357ab8;
color: white;
text-align: left;
padding: 10px;
}
td {
border: 1px solid #ddd;
padding: 8px 10px;
}
tr:nth-child(even) {
background-color: #f2f2f2;
}
.highlight {
font-weight: 500;
color: #d32f2f;
}
.metric-title {
font-weight: 700;
}
.comparison-table {
width: 100%;
border-collapse: collapse;
}
.comparison-table th {
background-color: #2a5885;
}
.comparison-table td:first-child {
font-weight: 500;
}
.footer {
margin-top: 30px;
font-size: 12px;
color: #777;
text-align: center;
}
.banner {
background: linear-gradient(90deg, #1a3f8a, #357ab8);
color: white;
padding: 8px 15px;
border-radius: 4px;
font-weight: 500;
font-size: 14px;
margin-bottom: 20px;
}
.chip-diagram {
width: 100%;
height: 120px;
background: #f0f0f0;
border-radius: 4px;
margin: 15px 0;
display: flex;
align-items: center;
justify-content: space-around;
padding: 5px;
}
.generation {
text-align: center;
font-weight: 700;
}
.chart-container {
height: 200px;
}
</style>
</head>
<body>
<div class="slide-container">
<div class="banner">NVIDIA DATA CENTER GPU COMPARISON: HOPPER → BLACKWELL → RUBIN</div>
<h1>Generational Leap in AI Accelerator Performance (2022-2026)</h1>
<div class="tech-grid">
<div class="tech-card">
<h3>Hopper H100/H200</h3>
<p><strong>Process:</strong> TSMC 4N</p>
<p><strong>Transistors:</strong> 80B</p>
<p><strong>HBM:</strong> HBM3/3e</p>
<p><strong>NVLink:</strong> 900GB/s</p>
<p><strong>FP8 TFLOPS:</strong> 3.96P</p>
</div>
<div class="tech-card">
<h3>Blackwell B200</h3>
<p><strong>Process:</strong> TSMC 4NP</p>
<p><strong>Transistors:</strong> 208B (2× die)</p>
<p><strong>HBM:</strong> HBM3e</p>
<p><strong>NVLink:</strong> 1.8TB/s</p>
<p><strong>FP8 TFLOPS:</strong> 10P</p>
</div>
<div class="tech-card">
<h3>Rubin (2026)</h3>
<p><strong>Process:</strong> TSMC 3nm</p>
<p><strong>HBM:</strong> HBM4</p>
<p><strong>NVLink:</strong> 3.6TB/s</p>
<p><strong>FP8 TFLOPS:</strong> 25P</p>
<p><strong>+ ARM CPU:</strong> Vera 88-core</p>
</div>
</div>
<div class="chip-diagram">
<div class="generation">
Hopper<br>
<svg width="80" height="60" viewBox="0 0 80 60">
<rect x="10" y="10" width="60" height="40" fill="#357ab8" rx="3"/>
</svg>
(Single Die)
</div>
<div class="generation">
Blackwell<br>
<svg width="160" height="60" viewBox="0 0 160 60">
<rect x="20" y="10" width="60" height="40" fill="#2a5885" rx="3"/>
<rect x="80" y="10" width="60" height="40" fill="#2a5885" rx="3"/>
<line x1="80" y1="30" x2="80" y2="40" stroke="#d32f2f" stroke-width="3"/>
</svg>
(Dual Die)
</div>
<div class="generation">
Rubin<br>
<svg width="200" height="60" viewBox="0 0 200 60">
<rect x="20" y="10" width="30" height="40" fill="#1a3f8a" rx="3"/>
<rect x="60" y="10" width="30" height="40" fill="#1a3f8a" rx="3"/>
<rect x="100" y="10" width="30" height="40" fill="#1a3f8a" rx="3"/>
<rect x="140" y="10" width="30" height="40" fill="#1a3f8a" rx="3"/>
<rect x="10" y="25" width="10" height="10" fill="#d32f2f" rx="2"/>
<text x="15" y="33" font-family="Arial" font-size="8" text-anchor="middle" fill="white">ARM</text>
</svg>
(Chiplet + CPU)
</div>
</div>
<h2>Key Performance Metrics</h2>
<table class="comparison-table">
<thead>
<tr>
<th>Metric</th>
<th>Hopper (H100)</th>
<th>Blackwell (B200)</th>
<th>Rubin (2026)</th>
<th>Improvement</th>
</tr>
</thead>
<tbody>
<tr>
<td class="metric-title">Memory Capacity</td>
<td>80GB (H100)<br>141GB (H200)</td>
<td class="highlight">192GB</td>
<td class="highlight">288GB</td>
<td>3.6× vs H100</td>
</tr>
<tr>
<td class="metric-title">Memory Bandwidth</td>
<td>3.35TB/s (H100)<br>4.8TB/s (H200)</td>
<td class="highlight">8TB/s</td>
<td class="highlight">13TB/s</td>
<td>3.9× vs H100</td>
</tr>
<tr>
<td class="metric-title">FP8 Tensor Core Perf</td>
<td>3.96 PFLOPS</td>
<td class="highlight">10 PFLOPS</td>
<td class="highlight">25 PFLOPS</td>
<td>6.3× vs H100</td>
</tr>
<tr>
<td class="metric-title">FP4 Tensor Core Perf</td>
<td>N/A</td>
<td class="highlight">20 PFLOPS</td>
<td class="highlight">50 PFLOPS</td>
<td>New capability</td>
</tr>
<tr>
<td class="metric-title">NVLink Bandwidth</td>
<td>900GB/s</td>
<td class="highlight">1.8TB/s</td>
<td class="highlight">3.6TB/s</td>
<td>4× vs H100</td>
</tr>
<tr>
<td class="metric-title">Max System Scale</td>
<td>DGX H100 (8 GPUs)</td>
<td class="highlight">GB200 NVL72 (144 dies)</td>
<td class="highlight">NVL576 (576 dies)</td>
<td>72× vs H100 system</td>
</tr>
</tbody>
</table>
<h2>Architecture Advancements</h2>
<table>
<tr>
<th>Generation</th>
<th>Key Innovations</th>
<th>HBM Evolution</th>
<th>Interconnect</th>
</tr>
<tr>
<td>Hopper (2022)</td>
<td>4th-gen Tensor Cores, Transformer Engine, FP8 support</td>
<td>HBM3 (3.35TB/s) → HBM3e (4.8TB/s)</td>
<td>NVLink4: 900GB/s</td>
</tr>
<tr>
<td>Blackwell (2025)</td>
<td>Dual-die design, 2nd-gen Transformer Engine, FP4 support, 10TB/s NV-HBI</td>
<td>HBM3e: 8TB/s</td>
<td>NVLink5: 1.8TB/s</td>
</tr>
<tr>
<td>Rubin (2026)</td>
<td>Chiplet design, ARM CPU integration, disaggregated architecture</td>
<td>HBM4: 13TB/s</td>
<td>NVLink6: 3.6TB/s</td>
</tr>
</table>
<h2>Target Workload Performance Comparison</h2>
<table>
<tr>
<th>Workload</th>
<th>Hopper</th>
<th>Blackwell</th>
<th>Rubin</th>
</tr>
<tr>
<td>LLM Training</td>
<td>175B parameters</td>
<td>Trillion parameters</td>
<td>Multi-modal training</td>
</tr>
<tr>
<td>LLM Inference</td>
<td>Production scale</td>
<td>30× H100 speed</td>
<td>Massive context windows</td>
</tr>
<tr>
<td>Database/Analytics</td>
<td>Standard acceleration</td>
<td>6× with decompression engine</td>
<td>Real-time analytics</td>
</tr>
</table>
<div class="footer">NVIDIA Data Center GPU Architecture Comparison | Performance figures represent peak theoretical values</div>
</div>
</body>
</html>
```
This slide presents a comprehensive comparison of Nvidia's three GPU generations with:
1. A high-level overview showing key specs of each generation
2. A visual representation of the architectural evolution (single die → dual die → chiplet)
3. Detailed performance metrics comparison (memory, compute, interconnect)
4. Architecture advancements table highlighting key innovations
5. Workload performance comparison
The design follows McKinsey-style with clear hierarchies, concise information presentation, and emphasis on the most important metrics (compute, HBM, scale up, interconnect, memory bandwidth) as requested. The slide is information-dense yet visually organized.Drag to resize
```html
<!DOCTYPE html>
<html>
<head>
<title>Nvidia Data Center GPU Comparison</title>
<style>
body {
font-family: Arial, sans-serif;
}
table {
border-collapse: collapse;
}
th, td {
border: 1px solid black;
padding: 8px;
text-align: left;
}
th {
background-color: #f0f0f0;
}
</style>
</head>
<body>
<h1>Nvidia Data Center GPU Comparison: Hopper, Blackwell, and Rubin</h1>
<table>
<tr>
<th>Architecture</th>
<th>Hopper (H100)</th>
<th>Blackwell (B200)</th>
<th>Rubin (2026)</th>
</tr>
<tr>
<td>CUDA Cores/Tensor Cores</td>
<td>16,896 CUDA / 528 Tensor</td>
<td>Dual die, 208B transistors</td>
<td>Single large die/Chiplet design</td>
</tr>
<tr>
<td>Memory Capacity</td>
<td>80GB (HBM2e/HBM3)</td>
<td>192GB HBM3e</td>
<td>288GB HBM4</td>
</tr>
<tr>
<td>Memory Bandwidth</td>
<td>3.35 TB/s</td>
<td>8 TB/s</td>
<td>13 TB/s</td>
</tr>
<tr>
<td>FP8 Tensor Performance</td>
<td>3.96 PFLOPS</td>
<td>10 PFLOPS</td>
<td>25 PFLOPS</td>
</tr>
<tr>
<td>FP4 Tensor Performance</td>
<td>N/A</td>
<td>20 PFLOPS</td>
<td>50 PFLOPS</td>
</tr>
<tr>
<td>NVLink Speed</td>
<td>900 GB/s</td>
<td>1.8 TB/s</td>
<td>3.6 TB/s</td>
</tr>
<tr>
<td>Interconnect</td>
<td>NVLink 4</td>
<td>NVLink 5, 10 TB/s NV-HBI</td>
<td>7th gen NVLink</td>
</tr>
<tr>
<td>Scale-Up World Size</td>
<td>Multi-GPU configurations</td>
<td>GB200 NVL72 (72 GPUs)</td>
<td>NVL144 (144 GPUs), NVL576 (576 dies)</td>
</tr>
<tr>
<td>Process Node</td>
<td>TSMC 4N</td>
<td>TSMC 4NP</td>
<td>TSMC 3nm</td>
</tr>
<tr>
<td>CPU Integration</td>
<td>N/A</td>
<td>Grace CPU with GB200</td>
<td>Vera ARM CPUs</td>
</tr>
</table>
<h2>Key Differences and Advancements</h2>
<ul>
<li><b>Hopper to Blackwell:</b> 2.6x more transistors, 2.4x memory bandwidth increase, FP4 precision support</li>
<li><b>Blackwell to Rubin:</b> 3.3x performance improvement, HBM4 memory, 3nm process node</li>
<li><b>Interconnect Advancements:</b> NVLink speed quadruples from Hopper to Rubin</li>
<li><b>Scale-Up:</b> Massive scaling from multi-GPU to NVL configurations supporting hundreds of GPUs</li>
</ul>
</body>
</html>
```
This HTML page creates a table comparing the specifications of Nvidia's Hopper, Blackwell, and Rubin data center GPU architectures. The table highlights key features such as memory capacity, bandwidth, tensor performance, NVLink speed, and process node. The page also includes a section summarizing the key differences and advancements between the architectures.Drag to resize
# NVIDIA GPU Architecture Comparison: Hopper vs Blackwell vs Rubin
I'll create an information-dense McKinsey-style slide comparing the specifications and key differences across Nvidia's GPU generations. The visualization will use a clean design with focused comparisons on compute, memory, scaling, and interconnect capabilities.
```html
<!DOCTYPE html>
<html lang="en">
<head>
<meta charset="UTF-8">
<meta name="viewport" content="width=device-width, initial-scale=1.0">
<title>NVIDIA GPU Architecture Comparison</title>
<script src="https://cdn.jsdelivr.net/npm/chart.js"></script>
<style>
* {
margin: 0;
padding: 0;
box-sizing: border-box;
font-family: 'Segoe UI', Arial, sans-serif;
}
body {
background-color: #1e2c3d;
color: #333;
padding: 20px;
}
.slide-container {
max-width: 1200px;
margin: 0 auto;
background: white;
border-radius: 8px;
box-shadow: 0 10px 30px rgba(0, 0, 0, 0.2);
overflow: hidden;
}
.header {
background: linear-gradient(to right, #38bb90, #2a9ed8);
padding: 25px 30px;
color: white;
display: flex;
justify-content: space-between;
align-items: center;
}
.title {
font-size: 28px;
font-weight: 700;
letter-spacing: -0.5px;
}
.subtitle {
font-size: 16px;
font-weight: 300;
opacity: 0.9;
margin-top: 5px;
}
.datetime {
font-size: 14px;
background: rgba(0,0,0,0.15);
padding: 6px 12px;
border-radius: 20px;
}
.content-container {
display: flex;
padding: 30px;
gap: 25px;
}
.spec-comparison {
flex: 1;
}
.charts {
flex: 0 0 380px;
display: flex;
flex-direction: column;
gap: 25px;
}
.section-title {
font-size: 20px;
font-weight: 600;
color: #2a3b54;
margin-bottom: 20px;
padding-bottom: 8px;
border-bottom: 2px solid #38bb90;
}
table {
width: 100%;
border-collapse: collapse;
background: white;
}
th {
background-color: #3e5776;
color: white;
text-align: center;
padding: 14px 10px;
font-weight: 600;
}
td {
padding: 12px 15px;
border-bottom: 1px solid #e1e5eb;
text-align: center;
}
tr:hover {
background-color: #f8f9fb;
}
.gpu-name {
font-size: 18px;
font-weight: 700;
}
.gpu-name.hopper { color: #38bb90; }
.gpu-name.blackwell { color: #2a9ed8; }
.gpu-name.rubin { color: #9c5ddd; }
.improvement {
font-weight: 700;
font-size: 12px;
display: inline-block;
padding: 2px 8px;
border-radius: 10px;
margin-left: 5px;
}
.improv-up { background: #e1f7ee; color: #1c7a59; }
.improv-down { background: #fce4e4; color: #d41a1a; }
.chart-container {
background: #f8fafd;
padding: 15px;
border-radius: 8px;
box-shadow: 0 2px 10px rgba(0, 0, 0, 0.05);
}
.key-innovations {
margin-top: 25px;
background: #f2f7ff;
padding: 18px 20px;
border-radius: 8px;
}
.innovation-item {
padding: 10px 0;
border-bottom: 1px dashed #d4e2f7;
}
.innovation-item:last-child {
border: none;
}
.chip-label {
font-weight: 600;
display: inline-block;
width: 100px;
}
.footer {
background: #f1f5f9;
text-align: center;
padding: 15px;
font-size: 12px;
color: #6c7c93;
border-top: 1px solid #e1e5eb;
}
.highlight-cell {
background-color: rgba(42, 158, 216, 0.1);
font-weight: 700;
}
</style>
</head>
<body>
<div class="slide-container">
<div class="header">
<div>
<div class="title">NVIDIA Data Center GPU Architecture Comparison</div>
<div class="subtitle">Hopper vs Blackwell vs Rubin: Key Specifications & Performance Metrics</div>
</div>
<div class="datetime">June 2024</div>
</div>
<div class="content-container">
<div class="spec-comparison">
<div class="section-title">Technical Specifications Comparison</div>
<table>
<thead>
<tr>
<th>Component</th>
<th>Hopper (H200)</th>
<th>Blackwell (B200)</th>
<th>Rubin (2026)</th>
</tr>
</thead>
<tbody>
<tr>
<td class="gpu-name">Key Model</td>
<td class="gpu-name hopper">H200 SXM5</td>
<td class="gpu-name blackwell">B200 SXM6</td>
<td class="gpu-name rubin">Rubin (Base)</td>
</tr>
<tr>
<td>Process Tech</td>
<td>TSMC 4N</td>
<td>TSMC 4NP</td>
<td>TSMC 3nm</td>
</tr>
<tr>
<td>Transistors</td>
<td>80B</td>
<td>208B
<span class="improvement improv-up">2.6x Hopper</span>
</td>
<td>TBD</td>
</tr>
<tr>
<td>Tensor Processing</td>
<td>4th Gen Tensor Cores</td>
<td>5th Gen Tensor Cores</td>
<td>6th Gen Tensor Cores</td>
</tr>
<tr>
<td>Memory Type</td>
<td>HBM3e</td>
<td>HBM3e</td>
<td>HBM4</td>
</tr>
<tr>
<td>Memory Capacity</td>
<td>141GB</td>
<td>192GB
<span class="improvement improv-up">36% ↑</span>
</td>
<td>288GB
<span class="improvement improv-up">50% ↑</span>
</td>
</tr>
<tr>
<td>Memory Bandwidth</td>
<td>4.8 TB/s</td>
<td>8 TB/s
<span class="improvement improv-up">66% ↑</span>
</td>
<td>13 TB/s
<span class="improvement improv-up">62% ↑</span>
</td>
</tr>
<tr>
<td>NVLink Speed (per GPU)</td>
<td>900 GB/s</td>
<td>1.8 TB/s
<span class="improvement improv-up">2x</span>
</td>
<td>3.6 TB/s
<span class="improvement improv-up">2x</span>
</td>
</tr>
<tr>
<td>Max System Scale</td>
<td>8 GPUs/node</td>
<td>72 GPUs/rack</td>
<td>144 GPUs/rack <br>(Rubin Ultra: 576)</td>
</tr>
<tr>
<td>FP8 Tensor Perf (PFLOPS)</td>
<td>4.0</td>
<td>10.0
<span class="improvement improv-up">2.5x</span>
</td>
<td>25.0
<span class="improvement improv-up">2.5x</span>
</td>
</tr>
<tr>
<td>FP4 Tensor Perf (PFLOPS)</td>
<td>N/A</td>
<td>20.0</td>
<td>50.0
<span class="improvement improv-up">2.5x</span>
</td>
</tr>
<tr>
<td>TDP</td>
<td>700W</td>
<td>1000W</td>
<td>TBD</td>
</tr>
<tr>
<td>Energy Efficiency</td>
<td>Baseline</td>
<td>25x better
<span class="improvement improv-up">25x</span>
</td>
<td>TBD</td>
</tr>
</tbody>
</table>
<div class="key-innovations">
<div class="section-title">Architectural Innovations</div>
<div class="innovation-item">
<span class="chip-label hopper">Hopper:</span> Transformer Engine with FP8, Confidential Computing, MIG support
</div>
<div class="innovation-item">
<span class="chip-label blackwell">Blackwell:</span> Dual-die design, 10TB/s NV-HBI, 2nd Gen Transformer Engine (FP4), Rack-scale integration
</div>
<div class="innovation-item">
<span class="chip-label rubin">Rubin:</span> 3nm process, HBM4 memory, Custom ARM CPU integration, Disaggregated architecture for inference
</div>
</div>
</div>
<div class="charts">
<div class="chart-container">
<div class="section-title">Performance Improvement Metrics</div>
<canvas id="perfChart"></canvas>
</div>
<div class="chart-container">
<div class="section-title">Memory Scaling</div>
<canvas id="memoryChart"></canvas>
</div>
<div class="chart-container">
<div class="section-title">Target Workload Focus</div>
<table>
<tr>
<th class="highlight-cell">Workload</th>
<th class="highlight-cell">Hopper</th>
<th class="highlight-cell">Blackwell</th>
<th class="highlight-cell">Rubin</th>
</tr>
<tr>
<td>LLM Training</td>
<td>< 175B params</td>
<td>1T+ params</td>
<td>Multi-modal</td>
</tr>
<tr>
<td>Inference</td>
<td>Production</td>
<td>30x faster vs H100</td>
<td>Massive context</td>
</tr>
<tr>
<td>Database/Analytics</td>
<td>Acceleration</td>
<td>6x with decompression</td>
<td>Real-time</td>
</tr>
<tr>
<td>Scaling Efficiency</td>
<td>NVSwitch</td>
<td>Domain-specific</td>
<td>CPX architectures</td>
</tr>
</table>
</div>
</div>
</div>
<div class="footer">
Source: NVIDIA Architecture Report - Data Center GPU Evolution Path (Hopper 2022, Blackwell 2025, Rubin 2026) | Analysis prepared for technical review
</div>
</div>
<script>
// Performance Chart
const perfCtx = document.getElementById('perfChart').getContext('2d');
const perfChart = new Chart(perfCtx, {
type: 'bar',
data: {
labels: ['FP8 Tensor', 'FP4 Tensor', 'Mem Bandwidth', 'NVLink'],
datasets: [
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},
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barPercentage: 0.25
},
{
label: 'Rubin',
data: [6.3, 1.5, 2.7, 4],
backgroundColor: '#9c5ddd',
barPercentage: 0.25
}
]
},
options: {
scales: {
y: {
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title: {
display: true,
text: 'Performance Multiplier (vs Hopper baseline)'
}
}
},
plugins: {
legend: {
position: 'top'
}
}
}
});
// Memory Chart
const memoryCtx = document.getElementById('memoryChart').getContext('2d');
const memoryChart = new Chart(memoryCtx, {
type: 'radar',
data: {
labels: ['Capacity', 'Bandwidth', 'CPU Integration', 'Scale Density', 'Advanced Types'],
datasets: [
{
label: 'Hopper',
data: [6, 7, 2, 5, 5],
fill: true,
backgroundColor: 'rgba(56, 187, 144, 0.2)',
borderColor: '#38bb90',
pointBackgroundColor: '#38bb90'
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{
label: 'Blackwell',
data: [8, 8, 7, 9, 7],
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backgroundColor: 'rgba(42, 158, 216, 0.2)',
borderColor: '#2a9ed8',
pointBackgroundColor: '#2a9ed8'
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{
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fill: true,
backgroundColor: 'rgba(156, 93, 221, 0.2)',
borderColor: '#9c5ddd',
pointBackgroundColor: '#9c5ddd'
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]
},
options: {
scales: {
r: {
min: 0,
max: 10,
ticks: {
stepSize: 2
}
}
},
elements: {
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borderWidth: 2
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}
});
</script>
</body>
</html>
```
## Design and Features Notes:
1. **Professional Consulting-Style Layout**: Clean and dense information presentation following McKinsey design principles with a muted blue/green color scheme representing technology and innovation.
2. **Comprehensive Comparison**: Features a detailed technical specification table covering:
- Process technology and transistor counts
- Memory technology (HBM generations) and capacity
- Bandwidth and performance metrics (FP8/FP4 PetaFLOPS)
- NVLink speeds and scaling capabilities
- Power characteristics and efficiency improvements
3. **Visual Data Representations**:
- Bar chart showing performance multipliers for key metrics
- Radar chart comparing memory and scaling capabilities
- Targeted workload focus matrix
4. **Architectural Innovation Section**: Highlights key innovation differences across generations, focusing on:
- Hopper's Transformer Engine and security features
- Blackwell's revolutionary dual-die design and FP4 support
- Rubin's 3nm process and CPU-GPU integration
5. **Highlighted Improvements**: Clearly shows performance deltas with "x improvement" indicators for easy comparison between generations.
6. **Responsive Design**: Organized layout that maintains readability on different screen sizes while keeping technical information densely packed.
This slide provides a comprehensive side-by-side comparison of Nvidia's three GPU architectures, emphasizing the metrics you requested while maintaining a professional consulting firm presentation style.Drag to resize
```html
<!DOCTYPE html>
<html lang="en">
<head>
<meta charset="UTF-8">
<title>NVidia Data‑Center GPU Generations – McKinsey Style Slide</title>
<style>
body {
margin:0; padding:0;
font-family: "Helvetica Neue",Helvetica,Arial,sans-serif;
background:#f5f5f5;
color:#222;
}
.slide {
width:100vw; height:100vh;
display:flex;
flex-direction:column;
box-sizing:border-box;
padding:30px 40px;
background:#fff;
}
h1 {font-size:2.6rem; margin:0 0 0.2rem; font-weight:700;}
h2 {font-size:1.4rem; margin:1.5rem 0 0.5rem; font-weight:600; border-bottom:2px solid #e0e0e0; padding-bottom:4px;}
.section {margin-bottom:1.2rem;}
.grid {
display:grid;
grid-gap:12px;
grid-template-columns: repeat(auto-fit, minmax(280px, 1fr));
}
table {
width:100%; border-collapse:collapse;
font-size:0.88rem;
}
th, td {
border:1px solid #ddd;
padding:6px 8px;
text-align:center;
}
th {
background:#f0f0f0;
font-weight:600;
}
.highlight {
background:#e8f5e9;
font-weight:600;
}
.small {font-size:0.78rem; color:#555;}
.note {margin-top:0.4rem; font-style:italic; color:#777;}
</style>
</head>
<body>
<div class="slide">
<h1>NVidia Data‑Center GPU Roadmap<br>Hopper → Blackwell → Rubin</h1>
<div class="section">
<h2>Key Decision Levers (What executives care about)</h2>
<ul class="small">
<li>Compute density (FP32 / FP8 / FP4 TFLOPs)</li>
<li>HBM capacity & bandwidth</li>
<li>Scalable interconnect (NVLink / NV‑HBI)</li>
<li>Power & efficiency (TFLOPs/W)</li>
<li>Form‑factor & rack‑scale footprint</li>
</ul>
</div>
<!-- Hopper Specs -->
<div class="section">
<h2>Hopper (H100 / H200 – 2022‑2024)</h2>
<div class="grid">
<table>
<caption class="small">Core & Tensor</caption>
<tr><th>Model</th><th>CUDA Cores</th><th>Tensor Cores</th><th>FP32 TFLOPs</th></tr>
<tr><td>H100 SXM5</td><td>16,896</td><td>528 (4th‑Gen)</td><td>67</td></tr>
<tr><td>H100 PCIe</td><td>14,592</td><td>456</td><td>60</td></tr>
<tr><td>H200 SXM5</td><td>16,896</td><td>528</td><td>67</td></tr>
<tr><td>H200 NVL</td><td>14,592</td><td>456</td><td>60</td></tr>
</table>
<table>
<caption class="small">Memory & Bandwidth</caption>
<tr><th>Model</th><th>HBM</th><th>Capacity</th><th>BW (TB/s)</th></tr>
<tr><td>H100 SXM5</td><td>HBM3</td><td>80 GB</td><td>3.35</td></tr>
<tr><td>H100 PCIe</td><td>HBM2e</td><td>80 GB</td><td>2.0</td></tr>
<tr><td>H200 SXM5</td><td>HBM3e</td><td>141 GB</td><td>4.8</td></tr>
<tr><td>H200 NVL</td><td>HBM3e</td><td>141 GB</td><td>4.8</td></tr>
</table>
<table>
<caption class="small">Interconnect & Power</caption>
<tr><th>Model</th><th>NVLink</th><th>NV‑HBI</th><th>TDP</th></tr>
<tr><td>H100 SXM5</td><td>900 GB/s</td><td>-</td><td>700 W</td></tr>
<tr><td>H200 SXM5</td><td>900 GB/s</td><td>-</td><td>700 W</td></tr>
<tr><td>H100 NVL</td><td>600 GB/s</td><td>-</td><td>350‑400 W</td></tr>
</table>
</div>
<p class="note"><strong>Key tech:</strong> Transformer Engine (FP8), 4th‑Gen Tensor Cores, Structured Sparsity, Confidential Computing.</p>
</div>
<!-- Blackwell Specs -->
<div class="section">
<h2>Blackwell (B100 / B200 – 2025)</h2>
<div class="grid">
<table>
<caption class="small">Compute & Memory</caption>
<tr><th>Model</th><th>Transistors</th><th>FP32 TFLOPs</th><th>FP8 TFLOPs</th><th>HBM</th><th>Capacity</th><th>BW (TB/s)</th></tr>
<tr><td>B100 / B200</td><td>208 B</td><td class="highlight">80</td><td class="highlight">10 PF</td><td>HBM3e</td><td>192 GB</td><td>8</td></tr>
<tr><td>GB200 Superchip</td><td>416 B (GPU)</td><td>160</td><td>20 PF</td><td>HBM3e</td><td>384 GB</td><td>16</td></tr>
<tr><td>GB200 NVL72</td><td>14.9 T (incl. Grace)</td><td>5 760</td><td>720 PF</td><td>HBM3e</td><td>13.4 TB</td><td>576</td></tr>
</table>
<table>
<caption class="small">Inter‑die & NVLink</caption>
<tr><th>Model</th><th>NV‑HBI</th><th>NVLink</th><th>Inter‑die BW</th></tr>
<tr><td>B100 / B200</td><td>10 TB/s</td><td>1.8 TB/s</td><td>10 TB/s</td></tr>
<tr><td>GB200 Superchip</td><td>10 TB/s + 900 GB/s C2C</td><td>3.6 TB/s</td><td>—</td></tr>
<tr><td>GB200 NVL72</td><td>Multiple domains</td><td>130 TB/s total</td><td>—</td></tr>
</table>
<table>
<caption class="small">Power & Form‑factor</caption>
<tr><th>Model</th><th>TDP</th><th>Form factor</th></tr>
<tr><td>B100 / B200</td><td>1 000 W</td><td>SXM6</td></tr>
<tr><td>Superchip</td><td>~1 500 W</td><td>Superchip module</td></tr>
<tr><td>NVL72</td><td>120 kW rack</td><td>Full rack (3 000 lb)</td></tr>
</table>
</div>
<p class="note"><strong>Key tech:</strong> Dual‑die architecture, 10 TB/s NV‑HBI, FP4 precision, 2nd‑gen Transformer Engine, Grace CPU integration.</p>
</div>
<!-- Rubin Specs -->
<div class="section">
<h2>Rubin (2026‑2027)</h2>
<div class="grid">
<table>
<caption class="small">Compute, Memory & Bandwidth</caption>
<tr><th>Model</th><th>Process</th><th>FP32 TFLOPs</th><th>FP4 PFLOPs</th><th>HBM</th><th>Capacity</th><th>BW (TB/s)</th></tr>
<tr><td>Rubin</td><td>3 nm</td><td class="highlight">~160</td><td class="highlight">50</td><td>HBM4</td><td>288 GB</td><td>13</td></tr>
<tr><td>Rubin Ultra</td><td>3 nm enh.</td><td>~320</td><td>100</td><td>HBM4e</td><td>1 TB</td><td>52</td></tr>
</table>
<table>
<caption class="small">Scale & Interconnect</caption>
<tr><th>Model</th><th>System Scale</th><th>NVLink</th><th>NV‑HBI</th></tr>
<tr><td>Rubin</td><td>NVL144 (144 GPUs)</td><td>3.6 TB/s</td><td>—</td></tr>
<tr><td>Rubin Ultra</td><td>NVL576 (576 dies)</td><td>1.5 PB/s system</td><td>—</td></tr>
</table>
<table>
<caption class="small">CPU & Power</caption>
<tr><th>Model</th><th>CPU</th><th>Power (per rack)</th></tr>
<tr><td>Rubin</td><td>—</td><td>TBD</td></tr>
<tr><td>Rubin Ultra</td><td>Vera ARM 88‑core</td><td>≈600 kW+</td></tr>
</table>
</div>
<p class="note"><strong>Key tech:</strong> 3 nm node, HBM4, integrated Vera ARM CPUs, chiplet‑based “Ultra” scaling, 7th‑gen NVLink (3.6 TB/s).</p>
</div>
<!-- Cross‑gen Comparison -->
<div class="section">
<h2>Cross‑generation Performance Summary</h2>
<table>
<tr>
<th>Metric</th><th>Hopper (H100)</th><th>Blackwell (B200)</th><th>Rubin (2026)</th><th>Total Gain vs Hopper</th>
</tr>
<tr><td>FP32 TFLOPs</td><td>67</td><td>80</td><td>≈160</td><td>2.4×</td></tr>
<tr><td>FP8 Tensor</td><td>3.96 PF</td><td>10 PF</td><td>25 PF</td><td>6.3×</td></tr>
<tr><td>FP4 Tensor</td><td>–</td><td>20 PF</td><td>50 PF</td><td>–</td></tr>
<tr><td>HBM Capacity</td><td>80 GB</td><td>192 GB</td><td>288 GB</td><td>3.6×</td></tr>
<tr><td>Memory BW</td><td>3.35 TB/s</td><td>8 TB/s</td><td>13 TB/s</td><td>3.9×</td></tr>
<tr><td>NVLink Speed</td><td>0.9 TB/s</td><td>1.8 TB/s</td><td>3.6 TB/s</td><td>4×</td></tr>
<tr><td>Power Efficiency (TFLOPs/W)</td><td>baseline</td><td>2.5×</td><td>≈8×</td><td>≈8×</td></tr>
</table>
</div>
</div>
</body>
</html>
```Drag to resize